gem_readl
__v = gem_readl((__bp), __reg); \
switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
regs_buff[13] = gem_readl(bp, DMACFG);
num_t2_scr = GEM_BFEXT(T2SCR, gem_readl(bp, DCFG8));
val = gem_readl(bp, DMACFG);
val = gem_readl(bp, NCFGR);
dcfg = gem_readl(bp, DCFG1);
dcfg = gem_readl(bp, DCFG12);
dcfg = gem_readl(bp, DCFG2);
if (GEM_BFEXT(PBUF_RSC, gem_readl(bp, DCFG6)))
if (!GEM_BFEXT(TSU, gem_readl(bp, DCFG5)))
GEM_BFEXT(PBUF_LSO, gem_readl(bp, DCFG6)))
reg = gem_readl(bp, DCFG8);
config = gem_readl(bp, USX_CONTROL);
val = gem_readl(bp, USX_STATUS);
val = gem_readl(bp, NCFGR);
gem_writel(bp, USX_CONTROL, gem_readl(bp, USX_CONTROL) |
bmsr = gem_readl(bp, PCSSTS);
lpa = gem_readl(bp, PCSANLPBASE);
if (GEM_BFEXT(PBUF_CUTTHRU, gem_readl(bp, DCFG6))) {
wtrmrk_rst_val = (1 << (GEM_BFEXT(RX_PBUF_ADDR, gem_readl(bp, DCFG2)))) - 1;
if (GEM_BFEXT(DAW64, gem_readl(bp, DCFG6))) {
val = GEM_BFEXT(RXBD_RDBUFF, gem_readl(bp, DCFG10));
val = GEM_BFEXT(TXBD_RDBUFF, gem_readl(bp, DCFG10));
old = gem_readl(bp, PCSANADV);
old = gem_readl(bp, PCSCNTRL);
gem_readl(bp, HS_MAC_CONFIG)));
first = gem_readl(bp, TN);
secl = gem_readl(bp, TSL);
sech = gem_readl(bp, TSH);
second = gem_readl(bp, TN);
ts->tv_nsec = gem_readl(bp, TN);
secl = gem_readl(bp, TSL);
sech = gem_readl(bp, TSH);