arch/mips/dec/prom/memory.c

66

bm = (memmap *)CKSEG0ADDR(0x28000);

arch/mips/fw/sni/sniprom.c

138

u32 *argv = (u32 *)CKSEG0ADDR(fw_arg1);

arch/mips/fw/sni/sniprom.c

145

strcat(arcs_cmdline, (char *)CKSEG0ADDR(argv[i]));

arch/mips/include/asm/mach-generic/spaces.h

52

#define CKSEG0ADDR_OR_64BIT(x) CKSEG0ADDR(x)

arch/mips/kernel/traps.c

2356

ebase = CKSEG0ADDR(ebase_pa);

arch/mips/mm/sc-rm7k.c

117

cache_op(Index_Store_Tag_T, CKSEG0ADDR(i));

arch/mips/mm/sc-rm7k.c

143

cache_op(Index_Store_Tag_SD, CKSEG0ADDR(i));

arch/mips/mm/sc-rm7k.c

93

unsigned long start = CKSEG0ADDR(0);