drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

157

generic_reg_get(CTX, REG(reg_name), \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

391

uint32_t generic_reg_get(const struct dc_context *ctx, uint32_t addr,

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

834

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1014

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

871

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1109

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

994

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

965

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

964

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

909

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1182

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1240

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1181

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1174

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1130

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1111

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1190

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1170

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1177

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1107

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,