drivers/gpu/drm/i915/gt/gen8_engine_cs.c

134

cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

158

cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

353

cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

65

cs = gen8_emit_pipe_control(cs, 0, 0);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

671

cs = gen8_emit_pipe_control(cs,

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

68

cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_DC_FLUSH_ENABLE,

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

691

cs = gen8_emit_pipe_control(cs,

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

71

cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

74

cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_CS_STALL, 0);

drivers/gpu/drm/i915/gt/intel_lrc.c

1360

cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE, 0);

drivers/gpu/drm/i915/gt/intel_lrc.c

1386

cs = gen8_emit_pipe_control(cs,

drivers/gpu/drm/i915/gt/intel_lrc.c

1652

batch = gen8_emit_pipe_control(batch,

drivers/gpu/drm/i915/gt/intel_lrc.c

1692

batch = gen8_emit_pipe_control(batch,

drivers/gpu/drm/i915/gt/intel_lrc.c

1764

batch = gen8_emit_pipe_control(batch,