drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

758

struct frl_cap_chk_params *frl_params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

826

struct frl_cap_chk_params *frl_params)

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

849

struct frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

857

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

865

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

75

struct frl_cap_chk_params *frl_params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

81

struct frl_cap_chk_params *frl_params);

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

85

struct frl_cap_chk_params *params);

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

88

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

92

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3351

struct frl_cap_chk_params hdmifrlparams = { 0 };

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3657

struct frl_cap_chk_params hdmifrlparams = { 0 };

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

3763

struct frl_cap_chk_params hdmifrlparams = { 0 };

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

1693

struct frl_cap_chk_params hdmifrlparams = { 0 };

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.c

215

struct frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.c

317

enum frl_cap_chk_result dml1_frl_cap_chk_uncompressed(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.c

434

enum frl_cap_chk_result dml1_frl_cap_chk_compressed(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.c

629

enum frl_cap_chk_result dml1_frl_cap_chk(struct frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.c

641

enum frl_cap_chk_result dml1_frl_cap_chk_inter(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

137

enum frl_cap_chk_result dml1_frl_cap_chk(struct frl_cap_chk_params *params);

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

139

enum frl_cap_chk_result dml1_frl_cap_chk_inter(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

143

struct frl_cap_chk_params *params);

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

145

enum frl_cap_chk_result dml1_frl_cap_chk_uncompressed(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

148

enum frl_cap_chk_result dml1_frl_cap_chk_compressed(struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

2747

frl_cap_chk_params hdmifrlparams = { 0 };

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.c

166

static frl_cap_chk_result frl_cap_chk_uncompressed(frl_cap_chk_params *params, frl_cap_chk_intermediates *inter)

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.c

278

static frl_cap_chk_result frl_cap_chk_compressed(frl_cap_chk_params *params, frl_cap_chk_intermediates *inter)

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.c

402

frl_cap_chk_result frl_cap_chk(frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.c

408

frl_cap_chk_result frl_cap_chk_inter(frl_cap_chk_params *params, frl_cap_chk_intermediates *inter)

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.c

50

static frl_cap_chk_result frl_cap_chk_common(frl_cap_chk_intermediates *inter, frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.h

106

frl_cap_chk_result frl_cap_chk(frl_cap_chk_params *params);

drivers/gpu/drm/amd/display/dc/dml2_0/dml_frl_cap_chk.h

107

frl_cap_chk_result frl_cap_chk_inter(frl_cap_chk_params *params, frl_cap_chk_intermediates *inter);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

798

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

810

struct frl_cap_chk_params *params,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

822

struct frl_cap_chk_params *params)

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

842

struct frl_cap_chk_params frl_params = {0};