drivers/clk/eswin/clk.c

111

val |= FIELD_PREP(PLL_FRAC_MASK, frac_val);

drivers/clk/eswin/clk.c

139

u64 fbdiv_val, frac_val, tmp;

drivers/clk/eswin/clk.c

148

frac_val = (val >> clk->frac_shift);

drivers/clk/eswin/clk.c

151

tmp = parent_rate * frac_val;

drivers/clk/eswin/clk.c

60

static void eswin_calc_pll(u32 *frac_val, u32 *fbdiv_val, unsigned long rate,

drivers/clk/eswin/clk.c

80

*frac_val = (u32)tmp;

drivers/clk/eswin/clk.c

92

u32 frac_val, fbdiv_val, val, mask;

drivers/clk/eswin/clk.c

95

eswin_calc_pll(&frac_val, &fbdiv_val, rate, parent_rate);

drivers/clk/hisilicon/clk-hi3559a.c

351

static void hi3559av100_calc_pll(u32 *frac_val, u32 *postdiv1_val,

drivers/clk/hisilicon/clk-hi3559a.c

362

*frac_val = 0;

drivers/clk/hisilicon/clk-hi3559a.c

369

*frac_val = rem;

drivers/clk/hisilicon/clk-hi3559a.c

377

u32 frac_val, postdiv1_val, postdiv2_val, fbdiv_val, refdiv_val;

drivers/clk/hisilicon/clk-hi3559a.c

382

hi3559av100_calc_pll(&frac_val, &postdiv1_val, &postdiv2_val,

drivers/clk/hisilicon/clk-hi3559a.c

390

val |= frac_val << clk->frac_shift;

drivers/clk/hisilicon/clk-hi3559a.c

410

u64 frac_val, fbdiv_val;

drivers/clk/hisilicon/clk-hi3559a.c

418

frac_val = val;

drivers/clk/hisilicon/clk-hi3559a.c

441

tmp = 24000000 * fbdiv_val + (24000000 * frac_val) / (1 << 24);

drivers/gpu/drm/i915/display/intel_link_bw.c

362

int frac_val;

drivers/gpu/drm/i915/display/intel_link_bw.c

382

err = str_to_fxp_q4_nonneg_int(frac_str, &frac_val);

drivers/gpu/drm/i915/display/intel_link_bw.c

388

frac_val > INT_MAX - int_pow(10, frac_digits) / 2)

drivers/gpu/drm/i915/display/intel_link_bw.c

391

frac_val = DIV_ROUND_CLOSEST(frac_val, (int)int_pow(10, frac_digits));

drivers/gpu/drm/i915/display/intel_link_bw.c

393

if (*val_x16 > INT_MAX - frac_val)

drivers/gpu/drm/i915/display/intel_link_bw.c

396

*val_x16 += frac_val;

drivers/iio/frequency/admv4420.c

102

u32 frac_val;

drivers/iio/frequency/admv4420.c

138

u32 frac_val, u32 mod_val)

drivers/iio/frequency/admv4420.c

142

put_unaligned_le32(frac_val, st->transf_buf);

drivers/iio/frequency/admv4420.c

248

st->n_counter.int_val = div_u64_rem(st->n_counter.n_counter, 10, &st->n_counter.frac_val);

drivers/iio/frequency/admv4420.c

329

st->n_counter.frac_val,

include/linux/habanalabs/cpucp_if.h

1303

struct frac_val bandwidth;

include/linux/habanalabs/cpucp_if.h

1304

struct frac_val lat;