drivers/gpib/fmh_gpib/fmh_gpib.c

1212

fifos_write(priv, 0x0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

1227

fifos_write(priv, 0x0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

1335

fifos_write(e_priv, RX_FIFO_CLEAR | TX_FIFO_CLEAR, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

1501

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

1632

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

435

fifos_write(e_priv, length & fifo_xfer_counter_mask, FIFO_XFER_COUNTER_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

436

fifos_write(e_priv, TX_FIFO_DMA_REQUEST_ENABLE | TX_FIFO_CLEAR, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

463

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

610

fifos_write(e_priv, length & fifo_xfer_counter_mask, FIFO_XFER_COUNTER_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

611

fifos_write(e_priv, TX_FIFO_CLEAR, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

619

fifos_write(e_priv, TX_FIFO_HALF_EMPTY_INTERRUPT_ENABLE, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

629

fifos_write(e_priv, data_value, FIFO_DATA_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

654

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

753

fifos_write(e_priv, length & fifo_xfer_counter_mask, FIFO_XFER_COUNTER_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

754

fifos_write(e_priv, RX_FIFO_DMA_REQUEST_ENABLE | RX_FIFO_CLEAR, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

781

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

930

fifos_write(e_priv, length & fifo_xfer_counter_mask, FIFO_XFER_COUNTER_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

931

fifos_write(e_priv, RX_FIFO_CLEAR, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

938

fifos_write(e_priv, RX_FIFO_HALF_FULL_INTERRUPT_ENABLE, FIFO_CONTROL_STATUS_REG);

drivers/gpib/fmh_gpib/fmh_gpib.c

956

fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);