arch/sparc/kernel/unaligned_32.c

145

return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));

arch/sparc/kernel/unaligned_32.c

148

return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));

arch/sparc/kernel/unaligned_32.c

191

zero[1] = fetch_reg(1, regs);

arch/sparc/kernel/unaligned_64.c

179

addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));

arch/sparc/kernel/unaligned_64.c

182

addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));

arch/sparc/kernel/unaligned_64.c

213

(unsigned int)fetch_reg(reg_num, regs) : 0)) << 32) |

arch/sparc/kernel/unaligned_64.c

214

(unsigned int)fetch_reg(reg_num + 1, regs);

arch/sparc/kernel/unaligned_64.c

408

value = fetch_reg(insn & 0x1f, regs);

arch/sparc/kernel/visemul.c

300

orig_rs1 = rs1 = fetch_reg(RS1(insn), regs);

arch/sparc/kernel/visemul.c

301

orig_rs2 = rs2 = fetch_reg(RS2(insn), regs);

arch/sparc/kernel/visemul.c

378

rs1 = fetch_reg(RS1(insn), regs);

arch/sparc/kernel/visemul.c

379

rs2 = fetch_reg(RS2(insn), regs);

arch/sparc/kernel/visemul.c

411

rs1 = fetch_reg(RS1(insn), regs);

arch/sparc/kernel/visemul.c

412

rs2 = fetch_reg(RS2(insn), regs);