fcpu
ci->use_dopb = fcpu(cpu, "xlnx,d-opb");
ci->use_iopb = fcpu(cpu, "xlnx,i-opb");
ci->use_dlmb = fcpu(cpu, "xlnx,d-lmb");
ci->use_ilmb = fcpu(cpu, "xlnx,i-lmb");
ci->num_fsl = fcpu(cpu, "xlnx,fsl-links");
ci->irq_edge = fcpu(cpu, "xlnx,interrupt-is-edge");
ci->irq_positive = fcpu(cpu, "xlnx,edge-is-positive");
ci->hw_debug = fcpu(cpu, "xlnx,debug-enabled");
ci->num_pc_brk = fcpu(cpu, "xlnx,number-of-pc-brk");
ci->num_rd_brk = fcpu(cpu, "xlnx,number-of-rd-addr-brk");
ci->num_wr_brk = fcpu(cpu, "xlnx,number-of-wr-addr-brk");
ci->pvr_user1 = fcpu(cpu, "xlnx,pvr-user1");
ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
ci->mmu = fcpu(cpu, "xlnx,use-mmu");
ci->mmu_privins = fcpu(cpu, "xlnx,mmu-privileged-instr");
ci->endian = fcpu(cpu, "xlnx,endianness");
(fcpu(cpu, "xlnx,use-barrel") ? PVR0_USE_BARREL_MASK : 0) |
(fcpu(cpu, "xlnx,use-msr-instr") ? PVR2_USE_MSR_INSTR : 0) |
(fcpu(cpu, "xlnx,use-pcmp-instr") ? PVR2_USE_PCMP_INSTR : 0) |
(fcpu(cpu, "xlnx,use-div") ? PVR0_USE_DIV_MASK : 0);
ci->use_mult = fcpu(cpu, "xlnx,use-hw-mul");
ci->use_fpu = fcpu(cpu, "xlnx,use-fpu");
(fcpu(cpu, "xlnx,unaligned-exceptions") ?
(fcpu(cpu, "xlnx,ill-opcode-exception") ?
(fcpu(cpu, "xlnx,iopb-bus-exception") ?
(fcpu(cpu, "xlnx,dopb-bus-exception") ?
(fcpu(cpu, "xlnx,div-zero-exception") ?
(fcpu(cpu, "xlnx,fpu-exception") ? PVR2_FPU_EXC_MASK : 0) |
(fcpu(cpu, "xlnx,fsl-exception") ? PVR2_USE_EXTEND_FSL : 0);
ci->use_icache = fcpu(cpu, "xlnx,use-icache");
ci->icache_tagbits = fcpu(cpu, "xlnx,addr-tag-bits");
ci->icache_write = fcpu(cpu, "xlnx,allow-icache-wr");
ci->icache_line_length = fcpu(cpu, "xlnx,icache-line-len") << 2;
if (fcpu(cpu, "xlnx,icache-use-fsl"))
ci->icache_size = fcpu(cpu, "i-cache-size");
ci->icache_base = fcpu(cpu, "i-cache-baseaddr");
ci->icache_high = fcpu(cpu, "i-cache-highaddr");
ci->use_dcache = fcpu(cpu, "xlnx,use-dcache");
ci->dcache_tagbits = fcpu(cpu, "xlnx,dcache-addr-tag");
ci->dcache_write = fcpu(cpu, "xlnx,allow-dcache-wr");
ci->dcache_line_length = fcpu(cpu, "xlnx,dcache-line-len") << 2;
if (fcpu(cpu, "xlnx,dcache-use-fsl"))
ci->dcache_size = fcpu(cpu, "d-cache-size");
ci->dcache_base = fcpu(cpu, "d-cache-baseaddr");
ci->dcache_high = fcpu(cpu, "d-cache-highaddr");
ci->dcache_wb = fcpu(cpu, "xlnx,dcache-use-writeback");
cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency");
cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries");
cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz");
cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr");
cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr");
cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr");
cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");
cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways");
cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size");
cpuinfo.icache_size = fcpu(cpu, "icache-size");
cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size");
cpuinfo.dcache_size = fcpu(cpu, "dcache-size");
cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits");
int fcpu = cpu_first_thread_sibling(lcpu);
nid = numa_cpu_lookup_table[fcpu];
if (fcpu != lcpu) {
WARN_ON(cpu_online(fcpu));
map_cpu_to_node(fcpu, nid);
int parse_cpu_mask_file(const char *fcpu, bool **mask, int *mask_sz)
fd = open(fcpu, O_RDONLY | O_CLOEXEC);
pr_warn("Failed to open cpu mask file %s: %s\n", fcpu, errstr(err));
pr_warn("Failed to read cpu mask from %s: %s\n", fcpu, errstr(err));
pr_warn("CPU mask is too big in file %s\n", fcpu);
static const char *fcpu = "/sys/devices/system/cpu/possible";
err = parse_cpu_mask_file(fcpu, &mask, &n);
int parse_cpu_mask_file(const char *fcpu, bool **mask, int *mask_sz);