drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
100
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
101
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
107
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
108
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
112
status = mod_hdcp_hdcp1_execution(hdcp, event_ctx, &input->hdcp1);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
115
event_ctx, &input->hdcp1);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
117
status = mod_hdcp_hdcp2_execution(hdcp, event_ctx, &input->hdcp2);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
120
event_ctx, &input->hdcp2);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
122
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
130
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
136
if (event_ctx->unexpected_event)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
173
event_ctx, &input->hdcp1, output);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
176
event_ctx, &input->hdcp1, output);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
179
event_ctx, &input->hdcp2, output);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
182
event_ctx, &input->hdcp2, output);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
541
struct mod_hdcp_event_context event_ctx;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
545
memset(&event_ctx, 0, sizeof(struct mod_hdcp_event_context));
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
546
event_ctx.event = event;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
549
exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
551
hdcp, &event_ctx, &hdcp->auth.trans_input, output);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
571
if (event_ctx.event == MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
94
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
158
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
163
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
164
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
181
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
186
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
187
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
223
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
228
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
229
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
265
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
270
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
271
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
283
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
288
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
289
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
290
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
291
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
323
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
329
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
330
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
387
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
392
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
393
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
410
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
415
if (event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
416
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
417
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
434
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
439
if (event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
440
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
476
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
483
status = wait_for_active_rx(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
486
status = exchange_ksvs(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
490
event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
493
status = authenticated(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
496
status = wait_for_ready(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
499
status = read_ksv_list(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
510
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
517
status = determine_rx_hdcp_capable_dp(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
520
status = exchange_ksvs(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
523
status = wait_for_r0_prime_dp(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
527
hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
530
status = authenticated_dp(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
533
status = wait_for_ready(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
536
status = read_ksv_list(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c
107
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c
152
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c
197
if (event_ctx->event == MOD_HDCP_EVENT_WATCHDOG_TIMEOUT)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c
259
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c
29
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
231
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
253
event_ctx->rx_id_list_ready = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
266
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
271
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
272
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
289
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
294
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
295
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
316
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
322
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
323
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
324
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
346
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
351
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
352
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
365
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
370
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
371
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
372
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
373
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
392
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
397
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
398
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
399
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
400
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
421
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
426
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
427
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
440
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
445
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
446
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
447
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
448
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
469
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
474
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
475
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
516
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
521
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
522
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
539
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
544
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
545
event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
546
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
549
if (event_ctx->event == MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
550
process_rxstatus(hdcp, event_ctx, input, &status);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
555
if (!process_rxstatus(hdcp, event_ctx, input, &status))
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
557
if (event_ctx->rx_id_list_ready)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
576
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
581
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
582
event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
583
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
587
process_rxstatus(hdcp, event_ctx, input, &status);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
593
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
598
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
599
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
600
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
601
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
605
if (!process_rxstatus(hdcp, event_ctx, input, &status))
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
607
if (!event_ctx->rx_id_list_ready) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
616
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
621
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
622
event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
623
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
626
if (event_ctx->event == MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
627
process_rxstatus(hdcp, event_ctx, input, &status);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
652
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
657
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
658
event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
659
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
662
if (event_ctx->event == MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
663
process_rxstatus(hdcp, event_ctx, input, &status);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
668
if (!process_rxstatus(hdcp, event_ctx, input, &status))
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
670
if (event_ctx->rx_id_list_ready)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
687
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
692
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
693
event_ctx->event != MOD_HDCP_EVENT_CPIRQ &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
694
event_ctx->event != MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
695
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
698
if (event_ctx->event == MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
699
process_rxstatus(hdcp, event_ctx, input, &status);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
704
if (!process_rxstatus(hdcp, event_ctx, input, &status))
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
706
if (event_ctx->rx_id_list_ready)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
728
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
733
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
734
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
751
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
756
if (event_ctx->event != MOD_HDCP_EVENT_CALLBACK &&
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
757
event_ctx->event != MOD_HDCP_EVENT_CPIRQ) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
758
event_ctx->unexpected_event = 1;
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
762
if (!process_rxstatus(hdcp, event_ctx, input, &status))
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
773
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
780
status = known_hdcp2_capable_rx(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
783
status = send_ake_init(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
786
status = validate_ake_cert(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
789
status = send_no_stored_km(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
792
status = read_h_prime(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
796
event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
799
status = send_stored_km(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
802
status = validate_h_prime(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
805
status = locality_check(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
808
status = exchange_ks_and_test_for_repeater(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
811
status = enable_encryption(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
814
status = authenticated(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
817
status = wait_for_rx_id_list(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
820
status = verify_rx_id_list_and_send_ack(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
823
status = send_stream_management(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
826
status = validate_stream_ready(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
837
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
844
status = determine_rx_hdcp_capable_dp(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
847
status = send_ake_init(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
850
status = validate_ake_cert(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
853
status = send_no_stored_km(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
856
status = read_h_prime(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
860
event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
863
status = send_stored_km(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
866
status = validate_h_prime(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
869
status = locality_check(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
873
event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
876
status = send_content_stream_type_dp(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
879
status = enable_encryption(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
882
status = authenticated(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
885
status = wait_for_rx_id_list(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
888
status = verify_rx_id_list_and_send_ack(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
891
status = send_stream_management(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
894
status = validate_stream_ready(hdcp, event_ctx, input);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
113
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
133
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
165
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
248
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
265
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
278
} else if (!event_ctx->rx_id_list_ready) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
279
if (event_ctx->event == MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
29
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
320
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
338
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
343
if (event_ctx->event == MOD_HDCP_EVENT_WATCHDOG_TIMEOUT) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
383
struct mod_hdcp_event_context *event_ctx,
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
450
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
466
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
495
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
579
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
601
} else if (event_ctx->rx_id_list_ready && conn->is_repeater) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
614
} else if (!event_ctx->rx_id_list_ready) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
615
if (event_ctx->event == MOD_HDCP_EVENT_WATCHDOG_TIMEOUT)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
652
} else if (event_ctx->rx_id_list_ready) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
658
if (event_ctx->event == MOD_HDCP_EVENT_CALLBACK)
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
66
if (event_ctx->event ==
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
673
} else if (event_ctx->rx_id_list_ready) {
drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c
686
} else if (event_ctx->event == MOD_HDCP_EVENT_CALLBACK) {
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c
13
struct mlx5_sf_peer_devlink_event_ctx event_ctx = {
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c
21
&event_ctx);
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c
22
return ret == NOTIFY_OK ? event_ctx.err : 0;
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
461
struct mlx5_sf_peer_devlink_event_ctx *event_ctx = data;
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
470
sf = mlx5_sf_lookup_by_function_id(table, event_ctx->fn_id);
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
474
event_ctx->err = devl_port_fn_devlink_set(&sf->dl_port.dl_port,
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
475
event_ctx->devlink);
drivers/scsi/mpi3mr/mpi3mr.h
1470
u32 event_ctx;
drivers/scsi/mpi3mr/mpi3mr.h
1510
u32 event_ctx);
drivers/scsi/mpi3mr/mpi3mr_fw.c
3802
u32 event_ctx)
drivers/scsi/mpi3mr/mpi3mr_fw.c
3821
evtack_req.event_context = cpu_to_le32(event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2622
delayed_evtack->event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2648
struct mpi3mr_drv_cmd *cmdparam, u32 event_ctx)
drivers/scsi/mpi3mr/mpi3mr_os.c
2660
event, event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2665
event, event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2683
delayed_evtack->event_ctx = event_ctx;
drivers/scsi/mpi3mr/mpi3mr_os.c
2688
event, event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2708
evtack_req.event_context = cpu_to_le32(event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
2719
event, event_ctx);
drivers/scsi/mpi3mr/mpi3mr_os.c
46
struct mpi3mr_drv_cmd *cmdparam, u32 event_ctx);
tools/testing/selftests/bpf/progs/verifier_map_in_map.c
295
struct rb_ctx event_ctx = __rb_event_reserve(256);
tools/testing/selftests/bpf/progs/verifier_map_in_map.c
296
__rb_event_submit(&event_ctx);