fbnic_wr32
fbnic_wr32(fbd, reg, v);
#define wr32(_f, _r, _v) fbnic_wr32(_f, _r, _v)
fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0),
fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0), 1u << FBNIC_FW_MSIX_ENTRY);
fbnic_wr32(fbd, FBNIC_INTR_MSIX_CTRL(FBNIC_INTR_MSIX_CTRL_PCS_IDX),
fbnic_wr32(fbd, FBNIC_INTR_MSIX_CTRL(FBNIC_INTR_MSIX_CTRL_PCS_IDX),
fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(0), 1u << FBNIC_PCS_MSIX_ENTRY);
fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0), 1u << FBNIC_FW_MSIX_ENTRY);
fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(0), 1u << FBNIC_FW_MSIX_ENTRY);
fbnic_wr32(fbd, FBNIC_PCS_PAGE(addr) + regnum, val);
fbnic_wr32(fbd, FBNIC_PTP_ADJUST, FBNIC_PTP_ADJUST_ADDEND_SET);
fbnic_wr32(fbd, FBNIC_PTP_CTRL,
fbnic_wr32(fbd, FBNIC_PTP_INIT_HI, 0);
fbnic_wr32(fbd, FBNIC_PTP_INIT_LO, 0);
fbnic_wr32(fbd, FBNIC_PTP_ADJUST, FBNIC_PTP_ADJUST_INIT);
fbnic_wr32(fbd, FBNIC_PTP_CTRL,
fbnic_wr32(fbd, FBNIC_PTP_ADD_VAL_NS,
fbnic_wr32(fbd, FBNIC_PTP_ADD_VAL_SUBNS, (u32)addend);
fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(v_idx / 32), 1 << (v_idx % 32));
fbnic_wr32(fbd, FBNIC_INTR_CQ_REARM(v_idx),
fbnic_wr32(fbd, FBNIC_INTR_CQ_REARM(nv->v_idx), val);
fbnic_wr32(fbd, FBNIC_INTR_SET(i), irqs[i]);
fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(i), irqs[i]);
fbnic_wr32(fbd, FBNIC_INTR_SET(i), irqs[i]);
fbnic_wr32(fbd, FBNIC_INTR_SET(nv->v_idx / 32), BIT(nv->v_idx % 32));