arch/loongarch/include/asm/asmmacro.h

198

fst.d $f4, \tmp, THREAD_FPR4 - THREAD_FPR0

arch/loongarch/include/asm/asmmacro.h

235

fld.d $f4, \tmp, THREAD_FPR4 - THREAD_FPR0

arch/loongarch/include/asm/fpregdef.h

14

#define fa4 $f4

arch/mips/include/asm/asmmacro-32.h

22

s.d $f4, THREAD_FPR4(\thread)

arch/mips/include/asm/asmmacro-32.h

46

l.d $f4, THREAD_FPR4(\thread)

arch/mips/include/asm/asmmacro.h

149

ldc1 $f4, THREAD_FPR4(\thread)

arch/mips/include/asm/asmmacro.h

90

sdc1 $f4, THREAD_FPR4(\thread)

arch/mips/include/asm/fpregdef.h

31

#define ft0 $f4 /* caller saved */

arch/mips/include/asm/fpregdef.h

72

#define ft0 $f4 /* caller saved */

arch/sparc/include/asm/hypervisor.h

1384

unsigned long f4; /* Entry specific */

crypto/testmgr.h

1090

be64_to_cpua(10, 0e, f4, 1f, 39, ca, 4d, 43),

crypto/testmgr.h

1093

be64_to_cpua(dd, ce, bc, b2, 97, f4, 9c, f3),

crypto/testmgr.h

947

be64_to_cpua(69, f4, 3b, 4f, 47, cf, 9b, 16),

crypto/testmgr.h

948

be64_to_cpua(19, fb, 5f, 92, f4, c9, 23, 37),

drivers/dma-buf/st-dma-fence-unwrap.c

352

struct dma_fence *fence, *f1, *f2, *f3, *f4;

drivers/dma-buf/st-dma-fence-unwrap.c

382

f4 = dma_fence_unwrap_merge(f1, f2, f3);

drivers/dma-buf/st-dma-fence-unwrap.c

383

if (!f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

388

dma_fence_unwrap_for_each(fence, &iter, f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

406

dma_fence_put(f4);

drivers/dma-buf/st-dma-fence-unwrap.c

484

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5;

drivers/dma-buf/st-dma-fence-unwrap.c

505

f4 = mock_array(2, dma_fence_get(f2), dma_fence_get(f1));

drivers/dma-buf/st-dma-fence-unwrap.c

506

if (!f4)

drivers/dma-buf/st-dma-fence-unwrap.c

510

f5 = dma_fence_unwrap_merge(f3, f4, dma_fence_get_stub());

drivers/dma-buf/st-dma-fence-unwrap.c

535

dma_fence_put(f4);

drivers/dma-buf/st-dma-fence-unwrap.c

547

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5, *f6, *f7;

drivers/dma-buf/st-dma-fence-unwrap.c

573

f4 = __mock_fence(ctx[1], 2);

drivers/dma-buf/st-dma-fence-unwrap.c

574

if (!f4)

drivers/dma-buf/st-dma-fence-unwrap.c

577

dma_fence_enable_sw_signaling(f4);

drivers/dma-buf/st-dma-fence-unwrap.c

583

f6 = mock_array(2, dma_fence_get(f3), dma_fence_get(f4));

drivers/dma-buf/st-dma-fence-unwrap.c

593

if (fence == f1 && f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

596

} else if (fence == f4 && !f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

597

dma_fence_put(f4);

drivers/dma-buf/st-dma-fence-unwrap.c

598

f4 = NULL;

drivers/dma-buf/st-dma-fence-unwrap.c

605

if (f1 || f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

616

dma_fence_put(f4);

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

100

FN(reg, f4), v4,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

104

#define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

110

FN(reg, f4), v4,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

115

#define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

121

FN(reg, f4), v4,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

127

#define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

133

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

140

#define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

146

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

171

#define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

176

FN(reg_name, f4), v4)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

178

#define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

183

FN(reg_name, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

186

#define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

191

FN(reg_name, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

195

#define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

200

FN(reg_name, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

205

#define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

210

FN(reg_name, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

245

#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

250

FN(reg, f4), v4)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

252

#define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

257

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

260

#define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

265

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

269

#define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

274

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

279

#define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

284

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

290

#define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

295

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

302

#define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

307

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

315

#define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

321

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

333

#define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

339

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

356

#define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

362

FN(reg, f4), v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

78

#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

83

FN(reg, f4), v4)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

85

#define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

91

FN(reg, f4), v4,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

94

#define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

103

#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

108

FN(reg, f4), v4)

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

76

#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

81

FN(reg, f4), v4)

drivers/hwmon/fam15h_power.c

328

static bool should_load_on_this_node(struct pci_dev *f4)

drivers/hwmon/fam15h_power.c

332

pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),

drivers/hwmon/fam15h_power.c

384

static int fam15h_power_init_data(struct pci_dev *f4,

drivers/hwmon/fam15h_power.c

391

pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);

drivers/hwmon/fam15h_power.c

395

pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),

drivers/hwmon/fam15h_power.c

403

dev_warn(&f4->dev,

drivers/hwmon/fam15h_power.c

410

ret = fam15h_power_init_attrs(f4, data);

drivers/hwmon/fam15h_power.c

78

struct pci_dev *f4 = data->pdev;

drivers/hwmon/fam15h_power.c

80

pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),

drivers/hwmon/fam15h_power.c

97

pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),

drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c

21

#define BRCMSTB_PIN(i, f1, f2, f3, f4, f5, f6, f7, f8) \

drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c

27

func_##f4, \

drivers/pinctrl/pinctrl-lpc18xx.c

213

#define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \

drivers/pinctrl/pinctrl-lpc18xx.c

218

FUNC_##f3, FUNC_##f4, FUNC_##f5, \

drivers/pinctrl/pinctrl-lpc18xx.c

225

#define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \

drivers/pinctrl/pinctrl-lpc18xx.c

230

FUNC_##f3, FUNC_##f4, FUNC_##f5, \

drivers/pinctrl/pinctrl-ocelot.c

1002

#define LAN966X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1010

FUNC_##f4, FUNC_##f5, FUNC_##f6, \

drivers/pinctrl/pinctrl-ocelot.c

1183

#define LAN969X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1191

FUNC_##f4, FUNC_##f5, FUNC_##f6, \

drivers/pinctrl/pinctrl-ocelot.c

1342

#define LAN9645X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1350

FUNC_##f4, FUNC_##f5, FUNC_##f6, \

drivers/pinctrl/pinctrl-rp1.c

148

#define PIN(i, f0, f1, f2, f3, f4, f5, f6, f7, f8) \

drivers/pinctrl/pinctrl-rp1.c

155

func_##f4, \

drivers/pinctrl/pinctrl-rp1.c

163

#define LEGACY_MAP(n, f0, f1, f2, f3, f4, f5) \

drivers/pinctrl/pinctrl-rp1.c

168

func_##f4, \

drivers/pinctrl/qcom/pinctrl-apq8064.c

211

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-apq8064.c

221

APQ_MUX_##f4, \

drivers/pinctrl/qcom/pinctrl-apq8084.c

326

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-apq8084.c

336

APQ_MUX_##f4, \

drivers/pinctrl/qcom/pinctrl-glymur.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-glymur.c

46

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq4019.c

218

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \

drivers/pinctrl/qcom/pinctrl-ipq4019.c

228

qca_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq5018.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5018.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq5332.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5332.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq5424.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5424.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq6018.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq6018.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq8064.c

163

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-ipq8064.c

173

IPQ_MUX_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq8074.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq8074.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-ipq9574.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq9574.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-kaanapali.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-kaanapali.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

46

#define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

55

LPI_MUX_##f4, \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

61

#define LPI_PINGROUP_OFFSET(id, soff, f1, f2, f3, f4, poff) \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

70

LPI_MUX_##f4, \

drivers/pinctrl/qcom/pinctrl-mdm9607.c

206

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-mdm9607.c

216

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-mdm9615.c

197

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-mdm9615.c

207

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-milos.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-milos.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8226.c

265

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8226.c

275

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8660.c

377

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8660.c

387

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8909.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8909.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8916.c

288

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8916.c

298

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8917.c

314

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8917.c

324

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8953.c

10

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8953.c

20

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8960.c

336

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-msm8960.c

346

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8976.c

26

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8994.c

12

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-msm8994.c

22

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8996.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8998.c

16

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8998.c

26

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

327

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

337

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-qcm2290.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcm2290.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-qcs404.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcs404.c

34

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-qcs615.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcs615.c

34

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-qcs8300.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11)\

drivers/pinctrl/qcom/pinctrl-qcs8300.c

23

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

26

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\

drivers/pinctrl/qcom/pinctrl-sa8775p.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sar2130p.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sar2130p.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sc7180.c

22

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc7180.c

32

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sc7280.c

12

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc7280.c

22

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

41

#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

51

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

81

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

82

PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9)

drivers/pinctrl/qcom/pinctrl-sc8280xp.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-sc8280xp.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdm660.c

27

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdm660.c

37

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdm670.c

18

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdm670.c

28

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdm845.c

17

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sdm845.c

27

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdx55.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdx55.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdx65.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sdx75.c

44

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm4450.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm4450.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm6115.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6115.c

34

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm6125.c

21

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6125.c

31

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm6350.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6350.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm6375.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6375.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm7150.c

28

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm7150.c

38

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8150.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8150.c

34

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8250.c

25

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8250.c

35

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8350.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8350.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8450.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8450.c

25

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8550.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8550.c

26

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8650.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sm8650.c

26

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-sm8750.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-sm8750.c

24

msm_mux_##f4, \

drivers/pinctrl/qcom/pinctrl-x1e80100.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-x1e80100.c

24

msm_mux_##f4, \

drivers/pinctrl/renesas/pfc-r8a77990.c

424

#define REV8(f0, f1, f2, f3, f4, f5, f6, f7) f0 f4 f2 f6 f1 f5 f3 f7

drivers/s390/block/dasd_eckd.h

300

__u8 f4;

fs/xfs/libxfs/xfs_trans_resv.c

1457

const unsigned int f4 = xfs_calc_finish_bui_reservation(mp, 1);

fs/xfs/libxfs/xfs_trans_resv.c

1460

*step_size = max(f4, max3(f1, f2, f3));

include/linux/indirect_call_wrapper.h

34

#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) \

include/linux/indirect_call_wrapper.h

37

likely(__f4 == f4) ? f4(__VA_ARGS__) : \

include/linux/indirect_call_wrapper.h

49

#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) f(__VA_ARGS__)

tools/perf/arch/s390/include/dwarf-regs-table.h

18

REG_DWARFNUM_NAME(f4, 18),

tools/testing/selftests/bpf/progs/core_reloc_types.h

1031

enum an_enum___diff f4;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1081

named_struct_typedef___diff_sz f4;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1132

named_struct_typedef___incompat f4;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1156

func_proto_typedef___fn_wrong_ret3 f4;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1194

named_struct_typedef f4;

tools/testing/selftests/bpf/progs/core_reloc_types.h

964

enum an_enum f4;

tools/testing/selftests/bpf/progs/test_global_func3.c

35

return f4(skb);

tools/testing/selftests/bpf/progs/test_global_func4.c

35

return f4(skb);