arch/loongarch/include/asm/asmmacro.h

197

fst.d $f3, \tmp, THREAD_FPR3 - THREAD_FPR0

arch/loongarch/include/asm/asmmacro.h

234

fld.d $f3, \tmp, THREAD_FPR3 - THREAD_FPR0

arch/loongarch/include/asm/fpregdef.h

13

#define fa3 $f3

arch/mips/include/asm/asmmacro.h

114

sdc1 $f3, THREAD_FPR3(\thread)

arch/mips/include/asm/asmmacro.h

173

ldc1 $f3, THREAD_FPR3(\thread)

arch/mips/include/asm/fpregdef.h

26

#define fv1f $f3

arch/mips/include/asm/fpregdef.h

85

#define ft13 $f3

arch/mips/math-emu/cp1emu.c

1418

#define DEF3OP(name, p, f1, f2, f3) \

arch/mips/math-emu/cp1emu.c

1428

s = f3(s); \

arch/sparc/include/asm/hypervisor.h

1383

unsigned long f3; /* Entry specific */

crypto/testmgr.h

1058

be64_to_cpua(df, d8, 68, a2, 64, 42, 65, f3),

crypto/testmgr.h

1093

be64_to_cpua(dd, ce, bc, b2, 97, f4, 9c, f3),

crypto/testmgr.h

1210

be64_to_cpua(5e, f9, 88, f3, d2, 32, 90, 57),

crypto/testmgr.h

1283

be64_to_cpua(6a, c3, f3, 7a, d1, fa, e7, a7),

crypto/testmgr.h

847

be64_to_cpua(f1, 03, 03, f3, 3b, e2, 73, f7),

crypto/testmgr.h

940

be64_to_cpua(8e, f3, 6f, dc, f8, 69, a6, 2e),

drivers/dma-buf/st-dma-fence-unwrap.c

261

struct dma_fence *fence, *f1, *f2, *f3;

drivers/dma-buf/st-dma-fence-unwrap.c

279

f3 = dma_fence_unwrap_merge(f1, f2);

drivers/dma-buf/st-dma-fence-unwrap.c

280

if (!f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

285

dma_fence_unwrap_for_each(fence, &iter, f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

303

dma_fence_put(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

352

struct dma_fence *fence, *f1, *f2, *f3, *f4;

drivers/dma-buf/st-dma-fence-unwrap.c

374

f3 = __mock_fence(ctx[0], 1);

drivers/dma-buf/st-dma-fence-unwrap.c

375

if (!f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

380

dma_fence_enable_sw_signaling(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

382

f4 = dma_fence_unwrap_merge(f1, f2, f3);

drivers/dma-buf/st-dma-fence-unwrap.c

389

if (fence == f3 && f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

390

dma_fence_put(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

391

f3 = NULL;

drivers/dma-buf/st-dma-fence-unwrap.c

392

} else if (fence == f2 && !f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

401

if (f2 || f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

408

dma_fence_put(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

484

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5;

drivers/dma-buf/st-dma-fence-unwrap.c

500

f3 = dma_fence_unwrap_merge(f1, f2);

drivers/dma-buf/st-dma-fence-unwrap.c

501

if (!f3)

drivers/dma-buf/st-dma-fence-unwrap.c

510

f5 = dma_fence_unwrap_merge(f3, f4, dma_fence_get_stub());

drivers/dma-buf/st-dma-fence-unwrap.c

537

dma_fence_put(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

547

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5, *f6, *f7;

drivers/dma-buf/st-dma-fence-unwrap.c

567

f3 = __mock_fence(ctx[0], 1);

drivers/dma-buf/st-dma-fence-unwrap.c

568

if (!f3)

drivers/dma-buf/st-dma-fence-unwrap.c

571

dma_fence_enable_sw_signaling(f3);

drivers/dma-buf/st-dma-fence-unwrap.c

583

f6 = mock_array(2, dma_fence_get(f3), dma_fence_get(f4));

drivers/dma-buf/st-dma-fence-unwrap.c

618

dma_fence_put(f3);

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

104

#define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

109

FN(reg, f3), v3,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

115

#define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

120

FN(reg, f3), v3,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

127

#define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

132

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

140

#define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

145

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

165

#define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

169

FN(reg_name, f3), v3)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

171

#define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

175

FN(reg_name, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

178

#define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

182

FN(reg_name, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

186

#define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

190

FN(reg_name, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

195

#define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

199

FN(reg_name, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

205

#define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

209

FN(reg_name, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

239

#define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

243

FN(reg, f3), v3)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

245

#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

249

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

252

#define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

256

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

260

#define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

264

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

269

#define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

273

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

279

#define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

283

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

290

#define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

294

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

302

#define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

306

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

315

#define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

320

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

333

#define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

338

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

356

#define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

361

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

386

#define REG_UPDATE_SEQ_3(reg, f1, v1, f2, v2, f3, v3) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

389

REG_SET(reg, val, f3, v3); }

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

72

#define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

76

FN(reg, f3), v3)

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

78

#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

82

FN(reg, f3), v3,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

85

#define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

90

FN(reg, f3), v3,\

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

94

#define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

99

FN(reg, f3), v3,\

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

101

FN(reg, f3), v3)

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

103

#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

107

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

70

#define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

74

FN(reg, f3), v3)

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

76

#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

80

FN(reg, f3), v3, \

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

97

#define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \

drivers/media/dvb-frontends/m88ds3103.c

455

u8 sm, f0 = 0, f1 = 0, f2 = 0, f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

489

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

496

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

503

f3 = div - f0 - f1 - f2;

drivers/media/dvb-frontends/m88ds3103.c

510

f3 = 16;

drivers/media/dvb-frontends/m88ds3103.c

528

if (f3 == 16)

drivers/media/dvb-frontends/m88ds3103.c

529

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

530

else if ((f3 < 8) && (f3 != 0))

drivers/media/dvb-frontends/m88ds3103.c

531

f3 = 8;

drivers/media/dvb-frontends/m88ds3103.c

539

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

546

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

553

f3 = div - f0 - f1 - f2;

drivers/media/dvb-frontends/m88ds3103.c

560

f3 = 16;

drivers/media/dvb-frontends/m88ds3103.c

578

if (f3 == 16)

drivers/media/dvb-frontends/m88ds3103.c

579

f3 = 0;

drivers/media/dvb-frontends/m88ds3103.c

580

else if ((f3 < 9) && (f3 != 0))

drivers/media/dvb-frontends/m88ds3103.c

581

f3 = 9;

drivers/media/dvb-frontends/m88ds3103.c

596

reg1E = ((f3 << 4) + f2) & 0xFF;

drivers/media/tuners/m88rs6000t.c

104

reg1E = ((f3 << 4) + f2) & 0xFF;

drivers/media/tuners/m88rs6000t.c

29

u8 N, f0 = 0, f1 = 0, f2 = 0, f3 = 0;

drivers/media/tuners/m88rs6000t.c

68

f3 = 0;

drivers/media/tuners/m88rs6000t.c

74

f3 = 0;

drivers/media/tuners/m88rs6000t.c

80

f3 = div - f0 - f1 - f2;

drivers/media/tuners/m88rs6000t.c

86

f3 = 16;

drivers/media/tuners/m88rs6000t.c

95

if (f3 == 16)

drivers/media/tuners/m88rs6000t.c

96

f3 = 0;

drivers/net/wireless/ath/ath9k/ar9003_calib.c

563

f3 = sin_2phi_1 - sin_2phi_2,

drivers/net/wireless/ath/ath9k/ar9003_calib.c

569

f2 = ((f1 >> 3) * (f1 >> 3) + (f3 >> 3) * (f3 >> 3)) >> 9;

drivers/net/wireless/ath/ath9k/ar9003_calib.c

577

mag_tx = f1 * (mag_a0_d0 - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);

drivers/net/wireless/ath/ath9k/ar9003_calib.c

579

phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);

drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c

21

#define BRCMSTB_PIN(i, f1, f2, f3, f4, f5, f6, f7, f8) \

drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c

26

func_##f3, \

drivers/pinctrl/pinctrl-falcon.c

51

#define MFP_FALCON(a, f0, f1, f2, f3) \

drivers/pinctrl/pinctrl-falcon.c

59

FALCON_MUX_##f3, \

drivers/pinctrl/pinctrl-lpc18xx.c

213

#define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \

drivers/pinctrl/pinctrl-lpc18xx.c

218

FUNC_##f3, FUNC_##f4, FUNC_##f5, \

drivers/pinctrl/pinctrl-lpc18xx.c

225

#define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \

drivers/pinctrl/pinctrl-lpc18xx.c

230

FUNC_##f3, FUNC_##f4, FUNC_##f5, \

drivers/pinctrl/pinctrl-ocelot.c

1002

#define LAN966X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1007

FUNC_##f3 \

drivers/pinctrl/pinctrl-ocelot.c

1183

#define LAN969X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1188

FUNC_##f3 \

drivers/pinctrl/pinctrl-ocelot.c

1342

#define LAN9645X_P(p, f0, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/pinctrl-ocelot.c

1347

FUNC_##f3 \

drivers/pinctrl/pinctrl-rp1.c

148

#define PIN(i, f0, f1, f2, f3, f4, f5, f6, f7, f8) \

drivers/pinctrl/pinctrl-rp1.c

154

func_##f3, \

drivers/pinctrl/pinctrl-rp1.c

163

#define LEGACY_MAP(n, f0, f1, f2, f3, f4, f5) \

drivers/pinctrl/pinctrl-rp1.c

172

func_##f3, \

drivers/pinctrl/pinctrl-xway.c

63

#define MFP_XWAY(a, f0, f1, f2, f3) \

drivers/pinctrl/pinctrl-xway.c

71

XWAY_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-apq8064.c

211

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-apq8064.c

220

APQ_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-apq8084.c

326

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-apq8084.c

335

APQ_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-glymur.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-glymur.c

45

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq4019.c

218

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \

drivers/pinctrl/qcom/pinctrl-ipq4019.c

227

qca_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq5018.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5018.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq5332.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5332.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq5424.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq5424.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq6018.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq6018.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq8064.c

163

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-ipq8064.c

172

IPQ_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq8074.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq8074.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-ipq9574.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-ipq9574.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-kaanapali.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-kaanapali.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

46

#define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

54

LPI_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

61

#define LPI_PINGROUP_OFFSET(id, soff, f1, f2, f3, f4, poff) \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

69

LPI_MUX_##f3, \

drivers/pinctrl/qcom/pinctrl-mdm9607.c

206

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-mdm9607.c

215

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-mdm9615.c

197

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-mdm9615.c

206

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-milos.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-milos.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8226.c

265

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8226.c

274

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8660.c

377

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8660.c

386

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8909.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8909.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8916.c

288

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8916.c

297

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8917.c

314

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8917.c

323

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8953.c

10

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8953.c

19

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8960.c

336

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-msm8960.c

345

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8976.c

25

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8994.c

12

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-msm8994.c

21

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8996.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8998.c

16

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-msm8998.c

25

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

327

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

336

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-qcm2290.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcm2290.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-qcs404.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcs404.c

33

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-qcs615.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qcs615.c

33

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-qcs8300.c

13

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11)\

drivers/pinctrl/qcom/pinctrl-qcs8300.c

22

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

25

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\

drivers/pinctrl/qcom/pinctrl-sa8775p.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sar2130p.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sar2130p.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sc7180.c

22

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc7180.c

31

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sc7280.c

12

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc7280.c

21

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

41

#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

50

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

81

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

82

PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9)

drivers/pinctrl/qcom/pinctrl-sc8280xp.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \

drivers/pinctrl/qcom/pinctrl-sc8280xp.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdm660.c

27

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdm660.c

36

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdm670.c

18

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdm670.c

27

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdm845.c

17

#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sdm845.c

26

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdx55.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdx55.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sdx65.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sdx75.c

43

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm4450.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm4450.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm6115.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6115.c

33

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm6125.c

21

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6125.c

30

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm6350.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6350.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm6375.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm6375.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm7150.c

28

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm7150.c

37

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8150.c

24

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8150.c

33

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8250.c

25

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8250.c

34

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8350.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8350.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8450.c

15

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8450.c

24

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8550.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-sm8550.c

25

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8650.c

16

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \

drivers/pinctrl/qcom/pinctrl-sm8650.c

25

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-sm8750.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \

drivers/pinctrl/qcom/pinctrl-sm8750.c

23

msm_mux_##f3, \

drivers/pinctrl/qcom/pinctrl-x1e80100.c

14

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \

drivers/pinctrl/qcom/pinctrl-x1e80100.c

23

msm_mux_##f3, \

drivers/pinctrl/renesas/pfc-r8a77990.c

423

#define REV4(f0, f1, f2, f3) f0 f2 f1 f3

drivers/pinctrl/renesas/pfc-r8a77990.c

424

#define REV8(f0, f1, f2, f3, f4, f5, f6, f7) f0 f4 f2 f6 f1 f5 f3 f7

drivers/pinctrl/renesas/pfc-r8a77995.c

397

#define REV4(f0, f1, f2, f3) f0 f2 f1 f3

drivers/pinctrl/tegra/pinctrl-tegra114.c

1547

#define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior, rcv_sel) \

drivers/pinctrl/tegra/pinctrl-tegra114.c

1556

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra124.c

1716

#define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior, rcv_sel) \

drivers/pinctrl/tegra/pinctrl-tegra124.c

1725

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra186.c

1640

#define PINGROUP(pg_name, f0, f1, f2, f3, r, bank, pupd, e_io_hv, e_lpbk, e_input, e_lpdr, e_pbias_buf, \

drivers/pinctrl/tegra/pinctrl-tegra186.c

1650

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra194.c

1571

#define PINGROUP(pg_name, f0, f1, f2, f3, r, bank, pupd, e_io_hv, e_lpbk, e_input, e_lpdr, e_pbias_buf, \

drivers/pinctrl/tegra/pinctrl-tegra194.c

1581

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra20.c

1968

#define MUX_PG(pg_name, f0, f1, f2, f3, \

drivers/pinctrl/tegra/pinctrl-tegra20.c

1978

TEGRA_MUX_ ## f3, \

drivers/pinctrl/tegra/pinctrl-tegra210.c

1275

#define PINGROUP(pg_name, f0, f1, f2, f3, r, hsm, drvtype, e_io_hv, \

drivers/pinctrl/tegra/pinctrl-tegra210.c

1286

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra234.c

1615

#define PINGROUP(pg_name, f0, f1, f2, f3, r, bank, pupd, e_io_hv, e_lpbk, e_input, e_lpdr, e_pbias_buf, \

drivers/pinctrl/tegra/pinctrl-tegra234.c

1625

TEGRA_MUX_##f3, \

drivers/pinctrl/tegra/pinctrl-tegra30.c

2108

#define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior) \

drivers/pinctrl/tegra/pinctrl-tegra30.c

2117

TEGRA_MUX_##f3, \

drivers/s390/block/dasd_eckd.h

294

__u16 f3;

drivers/s390/block/dasd_eckd.h

299

__u8 f3;

fs/xfs/libxfs/xfs_trans_resv.c

1456

const unsigned int f3 = xfs_calc_finish_cui_reservation(mp, 1);

fs/xfs/libxfs/xfs_trans_resv.c

1460

*step_size = max(f4, max3(f1, f2, f3));

fs/xfs/scrub/reap.c

1066

const unsigned int f3 = xfs_calc_finish_rt_cui_reservation(mp, 1);

fs/xfs/scrub/reap.c

1067

const unsigned int step_size = max3(f1, f2, f3);

fs/xfs/scrub/reap.c

1571

const unsigned int f3 = xfs_calc_finish_bui_reservation(mp, 1);

fs/xfs/scrub/reap.c

1572

const unsigned int step_size = max3(f1, f2, f3);

fs/xfs/scrub/reap.c

675

const unsigned int f3 = xfs_calc_finish_cui_reservation(mp, 1);

fs/xfs/scrub/reap.c

676

const unsigned int step_size = max3(f1, f2, f3);

include/linux/indirect_call_wrapper.h

28

#define INDIRECT_CALL_3(f, f3, f2, f1, ...) \

include/linux/indirect_call_wrapper.h

31

likely(__f3 == f3) ? f3(__VA_ARGS__) : \

include/linux/indirect_call_wrapper.h

34

#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) \

include/linux/indirect_call_wrapper.h

38

INDIRECT_CALL_3(__f4, f3, f2, f1, __VA_ARGS__); \

include/linux/indirect_call_wrapper.h

48

#define INDIRECT_CALL_3(f, f3, f2, f1, ...) f(__VA_ARGS__)

include/linux/indirect_call_wrapper.h

49

#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) f(__VA_ARGS__)

lib/crypto/x86/curve25519.h

1163

u64 f3;

lib/crypto/x86/curve25519.h

1186

f3 = f[3U];

lib/crypto/x86/curve25519.h

1190

m3 = eq_mask(f3, (u64)0x7fffffffffffffffU);

lib/crypto/x86/curve25519.h

1195

f3_ = f3 - (mask & (u64)0x7fffffffffffffffU);

mm/kasan/generic.c

344

DEFINE_ASAN_SET_SHADOW(f3);

tools/perf/arch/s390/include/dwarf-regs-table.h

17

REG_DWARFNUM_NAME(f3, 21),

tools/testing/selftests/bpf/progs/core_reloc_types.h

1030

union a_union___diff f3;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1080

enum an_enum___diff_sz f3;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1131

enum an_enum f3;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1155

func_proto_typedef___fn_wrong_ret2 f3;

tools/testing/selftests/bpf/progs/core_reloc_types.h

1193

enum an_enum f3;

tools/testing/selftests/bpf/progs/core_reloc_types.h

963

union a_union f3;

tools/testing/selftests/bpf/progs/test_global_func1.c

28

int f3(int, struct __sk_buff *skb, int);

tools/testing/selftests/bpf/progs/test_global_func1.c

37

return f1(skb) + f3(val, skb, 1);

tools/testing/selftests/bpf/progs/test_global_func1.c

54

return f0(1, skb) + f1(skb) + f2(2, skb) + f3(3, skb, 4);

tools/testing/selftests/bpf/progs/test_global_func2.c

26

int f3(int, struct __sk_buff *skb, int);

tools/testing/selftests/bpf/progs/test_global_func2.c

31

return f1(skb) + f3(val, skb, 1);

tools/testing/selftests/bpf/progs/test_global_func2.c

48

return f0(1, skb) + f1(skb) + f2(2, skb) + f3(3, skb, 4);

tools/testing/selftests/bpf/progs/test_global_func3.c

29

return f3(1, skb, 2);

tools/testing/selftests/bpf/progs/test_global_func4.c

29

return f3(1, skb, 2);

tools/testing/selftests/bpf/progs/test_global_func5.c

14

int f3(int, struct __sk_buff *skb);

tools/testing/selftests/bpf/progs/test_global_func5.c

19

return f1(skb) + f3(val, (void *)&val); /* type mismatch */

tools/testing/selftests/bpf/progs/test_global_func5.c

32

return f1(skb) + f2(2, skb) + f3(3, skb);

tools/testing/selftests/bpf/progs/test_global_func6.c

14

int f3(int, struct __sk_buff *skb);

tools/testing/selftests/bpf/progs/test_global_func6.c

19

return f1(skb) + f3(val, skb + 1); /* type mismatch */

tools/testing/selftests/bpf/progs/test_global_func6.c

32

return f1(skb) + f2(2, skb) + f3(3, skb);