ep93xx_pata_write_reg
ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL);
ep93xx_pata_write_reg(drv_data, tf->hob_feature,
ep93xx_pata_write_reg(drv_data, tf->hob_nsect,
ep93xx_pata_write_reg(drv_data, tf->hob_lbal,
ep93xx_pata_write_reg(drv_data, tf->hob_lbam,
ep93xx_pata_write_reg(drv_data, tf->hob_lbah,
ep93xx_pata_write_reg(drv_data, tf->feature,
ep93xx_pata_write_reg(drv_data, tf->nsect, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, tf->lbal, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, tf->lbam, IDECTRL_ADDR_LBAM);
ep93xx_pata_write_reg(drv_data, tf->lbah, IDECTRL_ADDR_LBAH);
ep93xx_pata_write_reg(drv_data, tf->device,
ep93xx_pata_write_reg(drv_data, tf->ctl | ATA_HOB,
ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL);
ep93xx_pata_write_reg(drv_data, tf->command,
ep93xx_pata_write_reg(drv_data, tmp, IDECTRL_ADDR_DEVICE);
ep93xx_pata_write_reg(drv_data, ctl, IDECTRL_ADDR_CTL);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL);
ep93xx_pata_write_reg(drv_data, ap->ctl | ATA_SRST, IDECTRL_ADDR_CTL);
ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL);