enetc_port_rd
return enetc_port_rd(&si->hw, reg);
reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
reg = enetc_port_rd(hw, ENETC_PSFCAPR);
reg = enetc_port_rd(hw, ENETC_PSGCAPR);
reg = enetc_port_rd(hw, ENETC_PFMCAPR);
hash_l = enetc_port_rd(hw, ENETC4_PSIUMHFR0(i));
hash_h = enetc_port_rd(hw, ENETC4_PSIUMHFR1(i));
hash_l = enetc_port_rd(hw, ENETC4_PSIMMHFR0(i));
hash_h = enetc_port_rd(hw, ENETC4_PSIMMHFR1(i));
val = enetc_port_rd(hw, ENETC4_PSIPMMR);
val = enetc_port_rd(hw, ENETC4_ECAPR1);
val = enetc_port_rd(hw, ENETC4_ECAPR2);
u32 val = enetc_port_rd(hw, ENETC4_PSIPVMR);
val = enetc_port_rd(hw, ENETC4_PMCAPR);
val = enetc_port_rd(hw, ENETC4_PSIMAFCAPR);
val = enetc_port_rd(hw, ENETC4_PCAPR);
val = enetc_port_rd(&priv->si->hw, ENETC4_PCR);
if (read_poll_timeout(enetc_port_rd, val,
val = enetc_port_rd(hw, ENETC4_POR);
val = enetc_port_rd(hw, ENETC4_POR);
if (read_poll_timeout(enetc_port_rd, val,
u32 val = enetc_port_rd(hw, ENETC4_PSIPMMR);
val = enetc_port_rd(hw, ENETC4_PM_CMD_CFG(1));
val = enetc_port_rd(hw, ENETC4_PM_CMD_CFG(0));
if (read_poll_timeout(enetc_port_rd, val,
val = enetc_port_rd(hw, ENETC4_POR);
val = enetc_port_rd(hw, ENETC4_POR);
s->MACMergeFrameAssErrorCount = enetc_port_rd(hw, ENETC_MMFAECR);
s->MACMergeFrameSmdErrorCount = enetc_port_rd(hw, ENETC_MMFSECR);
s->MACMergeFrameAssOkCount = enetc_port_rd(hw, ENETC_MMFAOCR);
s->MACMergeFragCountRx = enetc_port_rd(hw, ENETC_MMFCRXR);
s->MACMergeFragCountTx = enetc_port_rd(hw, ENETC_MMFCTXR);
s->MACMergeHoldCount = enetc_port_rd(hw, ENETC_MMHCR);
val = enetc_port_rd(hw, ENETC_PFPMR);
val = enetc_port_rd(hw, ENETC_MMCSR);
return read_poll_timeout(enetc_port_rd, val,
val = enetc_port_rd(hw, ENETC_PTCFPR(tc));
val = enetc_port_rd(hw, ENETC_MMCSR);
u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG);
val = enetc_port_rd(hw, ENETC_PFPMR);
val = enetc_port_rd(hw, ENETC_MMCSR);
val = enetc_port_rd(hw, ENETC_MMCSR);
data[o++] = enetc_port_rd(hw, enetc_port_counters[i].reg);
((u32 *)key)[i] = enetc_port_rd(hw, base + i * 4);
psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) &
cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1));
val = enetc_port_rd(hw, ENETC_PRFSCAPR);
val = enetc_port_rd(hw, ENETC_PCAPR0);
val = enetc_port_rd(hw, ENETC_PCAPR0);
u32 val = enetc_port_rd(hw, ENETC_PSIPVMR);
val = enetc_port_rd(hw, ENETC_PRFSCAPR);
val = enetc_port_rd(hw, ENETC_PRSSCAPR);
return enetc_port_rd(hw, ENETC_PTCCBSR0(tc)) & ENETC_CBSE;
return enetc_port_rd(hw, ENETC_PTCCBSR0(tc)) & ENETC_CBS_BW_MASK;
enetc_port_rd(hw, ENETC_PTCMSDUR(tc));
ma = enetc_port_rd(hw, ENETC_PTCMSDUR(prio_top)) * 8;
tmp = enetc_port_rd(hw, ENETC_PMR);