ene_read_reg
dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
(ene_read_reg(dev, ENE_PLLFRL) >> 4);
fw_reg1 = ene_read_reg(dev, ENE_FW1);
fw_reg2 = ene_read_reg(dev, ENE_FW2);
tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
dev->w_pointer = ene_read_reg(dev, ENE_FW2)
int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
fw_flags2 = ene_read_reg(dev, ENE_FW2);
irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
irq_status = ene_read_reg(dev, ENE_IRQ);
fw_flags1 = ene_read_reg(dev, ENE_FW1);
hw_value = ene_read_reg(dev, reg);
hw_value |= ene_read_reg(dev, reg + offset) << 8;
chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
hw_revision = ene_read_reg(dev, ENE_ECHV);
old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);