drivers/gpu/drm/radeon/sumo_dpm.c

537

cg_sclk_dpm_ctrl_3 = RREG32(CG_SCLK_DPM_CTRL_3);

drivers/gpu/drm/radeon/sumo_dpm.c

541

WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);

drivers/gpu/drm/radeon/sumo_dpm.c

599

if (RREG32(CG_SCLK_DPM_CTRL_3) & DPM_SCLK_ENABLE)

drivers/gpu/drm/radeon/sumo_dpm.c

607

WREG32_P(CG_SCLK_DPM_CTRL_3, DPM_SCLK_ENABLE, ~DPM_SCLK_ENABLE);

drivers/gpu/drm/radeon/sumo_dpm.c

612

WREG32_P(CG_SCLK_DPM_CTRL_3, 0, ~DPM_SCLK_ENABLE);

drivers/gpu/drm/radeon/sumo_dpm.c

618

WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_SCLK_STATE_EN, ~FORCE_SCLK_STATE_EN);

drivers/gpu/drm/radeon/sumo_dpm.c

620

WREG32_P(CG_SCLK_DPM_CTRL_3, 0, ~FORCE_SCLK_STATE_EN);

drivers/gpu/drm/radeon/sumo_dpm.c

726

WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_SCLK_STATE(index), ~FORCE_SCLK_STATE_MASK);

drivers/gpu/drm/radeon/sumo_dpm.c

940

u32 cg_sclk_dpm_ctrl_3 = RREG32(CG_SCLK_DPM_CTRL_3);

drivers/gpu/drm/radeon/sumo_dpm.c

946

WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);

drivers/gpu/drm/radeon/sumo_dpm.c

963

WREG32_P(CG_SCLK_DPM_CTRL_3, CNB_THERMTHRO_MASK_SCLK,

drivers/gpu/drm/radeon/sumo_dpm.c

990

WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_NB_PSTATE_1, ~FORCE_NB_PSTATE_1);

drivers/gpu/drm/radeon/sumo_dpm.c

992

WREG32_P(CG_SCLK_DPM_CTRL_3, 0, ~FORCE_NB_PSTATE_1);