drivers/memory/tegra/tegra20-emc.c

595

u32 emc_cfg, emc_dbg, emc_fbio, emc_adr_cfg;

drivers/memory/tegra/tegra20-emc.c

624

emc_dbg = readl_relaxed(emc->regs + EMC_DBG);

drivers/memory/tegra/tegra20-emc.c

625

emc_dbg |= EMC_DBG_CFG_PRIORITY;

drivers/memory/tegra/tegra20-emc.c

626

emc_dbg &= ~EMC_DBG_READ_MUX_ASSEMBLY;

drivers/memory/tegra/tegra20-emc.c

627

emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE;

drivers/memory/tegra/tegra20-emc.c

628

emc_dbg &= ~EMC_DBG_FORCE_UPDATE;

drivers/memory/tegra/tegra20-emc.c

629

writel_relaxed(emc_dbg, emc->regs + EMC_DBG);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1003

emc_dbg(emc, STEPS, "Step 10\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

108

emc_dbg(emc, EMA_UPDATES, "%s: (s=%u) EMA: %u\n", \

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1100

emc_dbg(emc, STEPS, "Step 11\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1104

value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY;

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1114

emc_dbg(emc, STEPS, "Step 12\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1124

emc_dbg(emc, STEPS, "Step 13\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1127

ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1133

emc_dbg(emc, STEPS, "Step 14\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1150

emc_dbg(emc, STEPS, "Step 15\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1162

emc_dbg(emc, INFO, "tZQCAL_lpddr4_fc_adj = %u\n", tZQCAL_lpddr4_fc_adj);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1163

emc_dbg(emc, INFO, "dst_clk_period = %u\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1165

emc_dbg(emc, INFO, "next->dram_timings[T_PDEX] = %u\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1167

emc_dbg(emc, INFO, "zq_latch_dvfs_wait_time = %d\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1239

emc_dbg(emc, STEPS, "Step 17\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1248

emc_dbg(emc, STEPS, "Step 18\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1269

emc_dbg(emc, STEPS, "Step 19\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1329

emc_dbg(emc, STEPS, "Step 20\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1343

emc_dbg(emc, STEPS, "Step 21\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1346

ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1356

ccfifo_writel(emc, emc_dbg, EMC_DBG, 0);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1363

emc_dbg(emc, STEPS, "Step 22\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1383

emc_dbg(emc, STEPS, "Step 23\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1405

emc_dbg(emc, STEPS, "Step 25\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1419

emc_dbg(emc, STEPS, "Step 26\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1448

emc_dbg(emc, STEPS, "Step 27\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1461

emc_dbg(emc, STEPS, "Step 28\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1473

emc_dbg(emc, STEPS, "Step 29\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

1494

emc_dbg(emc, STEPS, "Step 30: Re-enable DLL and AUTOCAL\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

262

emc_dbg(emc, PER_TRAIN, "Periodic training starting\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

311

emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

368

u32 emc_dbg, emc_cfg_pipe_clk, emc_pin;

drivers/memory/tegra/tegra210-emc-cc-r21021.c

376

emc_dbg(emc, INFO, "Running clock change.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

413

emc_dbg = emc_readl(emc, EMC_DBG);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

427

emc_dbg(emc, INFO, "Clock change version: %d\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

429

emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

430

emc_dbg(emc, INFO, "DRAM dev #: %u\n", emc->num_devices);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

431

emc_dbg(emc, INFO, "Next EMC clksrc: 0x%08x\n", clksrc);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

432

emc_dbg(emc, INFO, "DLL clksrc: 0x%08x\n", next->dll_clk_src);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

433

emc_dbg(emc, INFO, "last rate: %u, next rate %u\n", last->rate,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

435

emc_dbg(emc, INFO, "last period: %u, next period: %u\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

437

emc_dbg(emc, INFO, " shared_zq_resistor: %d\n", !!shared_zq_resistor);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

438

emc_dbg(emc, INFO, " num_channels: %u\n", emc->num_channels);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

439

emc_dbg(emc, INFO, " opt_dll_mode: %d\n", opt_dll_mode);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

445

emc_dbg(emc, STEPS, "Step 1\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

446

emc_dbg(emc, STEPS, "Step 1.1: Disable DLL temporarily.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

458

emc_dbg(emc, STEPS, "Step 1.2: Disable AUTOCAL temporarily.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

469

emc_dbg(emc, STEPS, "Step 1.3: Disable other power features.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

568

emc_dbg(emc, STEPS, "Step 2\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

572

emc_dbg(emc, INFO, "Prelock enabled for target frequency.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

574

emc_dbg(emc, INFO, "DLL out: 0x%03x\n", value);

drivers/memory/tegra/tegra210-emc-cc-r21021.c

576

emc_dbg(emc, INFO, "Disabling DLL for target frequency.\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

584

emc_dbg(emc, STEPS, "Step 3\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

604

emc_dbg(emc, STEPS, "Step 4\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

615

emc_dbg(emc, STEPS, "Step 5\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

632

emc_dbg(emc, STEPS, "Step 6\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

638

emc_dbg(emc, STEPS, "Step 7\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

639

emc_dbg(emc, SUB_STEPS, "Step 7.1: Bug 200024907 - Patch RP R2P");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

672

emc_dbg(emc, INFO, "tRTM = %u, EMC_RP = %u\n", tRTM,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

723

emc_dbg(emc, INFO, "Skipped WAR\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

745

emc_dbg(emc, STEPS, "Step 8\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

746

emc_dbg(emc, SUB_STEPS, "Writing burst_regs\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

825

emc_dbg(emc, SUB_STEPS, "Writing burst_regs_per_ch\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

851

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

859

emc_dbg(emc, SUB_STEPS, "Writing vref_regs\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

871

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

878

emc_dbg(emc, SUB_STEPS, "Writing trim_regs\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

898

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

900

emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n",

drivers/memory/tegra/tegra210-emc-cc-r21021.c

904

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

911

emc_dbg(emc, SUB_STEPS, "Writing trim_regs_per_ch\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

938

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

940

emc_dbg(emc, EMA_WRITES, "0x%08x <= 0x%08x\n", offset,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

944

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

951

emc_dbg(emc, SUB_STEPS, "Writing burst_mc_regs\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

957

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

966

emc_dbg(emc, SUB_STEPS, "Writing la_scale_regs\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

969

emc_dbg(emc, REG_LISTS, "(%u) 0x%08x => 0x%08x\n", i,

drivers/memory/tegra/tegra210-emc-cc-r21021.c

982

emc_dbg(emc, STEPS, "Step 9\n");

drivers/memory/tegra/tegra210-emc-cc-r21021.c

991

value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE |

drivers/memory/tegra/tegra210-emc-cc-r21021.c

996

emc_writel(emc, emc_dbg, EMC_DBG);

drivers/memory/tegra/tegra210-emc-core.c

887

u32 emc_dbg = emc_readl(emc, EMC_DBG);

drivers/memory/tegra/tegra210-emc-core.c

890

emc_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG);

drivers/memory/tegra/tegra210-emc-core.c

892

emc_writel(emc, emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

1117

u32 fbio_cfg5, emc_cfg, emc_dbg, emc_adr_cfg;

drivers/memory/tegra/tegra30-emc.c

1152

emc_dbg = readl_relaxed(emc->regs + EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

1153

emc_dbg |= EMC_DBG_CFG_PRIORITY;

drivers/memory/tegra/tegra30-emc.c

1154

emc_dbg &= ~EMC_DBG_READ_MUX_ASSEMBLY;

drivers/memory/tegra/tegra30-emc.c

1155

emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE;

drivers/memory/tegra/tegra30-emc.c

1156

emc_dbg &= ~EMC_DBG_FORCE_UPDATE;

drivers/memory/tegra/tegra30-emc.c

1157

writel_relaxed(emc_dbg, emc->regs + EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

534

u32 emc_dbg;

drivers/memory/tegra/tegra30-emc.c

555

emc_dbg = readl_relaxed(emc->regs + EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

689

writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE,

drivers/memory/tegra/tegra30-emc.c

693

writel_relaxed(emc_dbg, emc->regs + EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

715

writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, emc->regs + EMC_DBG);

drivers/memory/tegra/tegra30-emc.c

728

writel_relaxed(emc_dbg, emc->regs + EMC_DBG);