drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1271

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_CLK, 0);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1272

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_0,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1274

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_1, 0);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1275

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_2, 0);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1276

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_3, 0);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1279

dw_mipi_dsi_phy_write(dsi, 0x0, 0);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

457

dw_mipi_dsi_phy_write(dsi, PLL_BIAS_CUR_SEL_CAP_VCO_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

463

dw_mipi_dsi_phy_write(dsi, PLL_CP_CONTROL_PLL_LOCK_BYPASS,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

465

dw_mipi_dsi_phy_write(dsi, PLL_LPF_AND_CP_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

469

dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_0,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

472

dw_mipi_dsi_phy_write(dsi, PLL_INPUT_DIVIDER_RATIO,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

474

dw_mipi_dsi_phy_write(dsi, PLL_LOOP_DIVIDER_RATIO,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

483

dw_mipi_dsi_phy_write(dsi, PLL_INPUT_AND_LOOP_DIVIDER_RATIOS_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

485

dw_mipi_dsi_phy_write(dsi, PLL_LOOP_DIVIDER_RATIO,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

488

dw_mipi_dsi_phy_write(dsi, PLL_INPUT_AND_LOOP_DIVIDER_RATIOS_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

491

dw_mipi_dsi_phy_write(dsi, AFE_BIAS_BANDGAP_ANALOG_PROGRAMMABILITY,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

493

dw_mipi_dsi_phy_write(dsi, AFE_BIAS_BANDGAP_ANALOG_PROGRAMMABILITY,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

496

dw_mipi_dsi_phy_write(dsi, BANDGAP_AND_BIAS_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

500

dw_mipi_dsi_phy_write(dsi, TERMINATION_RESISTER_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

503

dw_mipi_dsi_phy_write(dsi, TERMINATION_RESISTER_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

508

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_REQUEST_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

510

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_PREPARE_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

512

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_HS_ZERO_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

514

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_TRAIL_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

516

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_EXIT_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

518

dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_POST_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

521

dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_REQUEST_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

523

dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_PREPARE_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

525

dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_HS_ZERO_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

527

dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_TRAIL_STATE_TIME_CONTROL,

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

529

dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_EXIT_STATE_TIME_CONTROL,