Symbol: CGU_REG_OPCR
drivers/clk/ingenic/jz4725b-cgu.c
246
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/jz4725b-cgu.c
252
.gate = { CGU_REG_OPCR, 6, true },
drivers/clk/ingenic/jz4755-cgu.c
184
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/jz4755-cgu.c
321
.gate = { CGU_REG_OPCR, 6, true },
drivers/clk/ingenic/jz4760-cgu.c
402
.gate = { CGU_REG_OPCR, 5 },
drivers/clk/ingenic/jz4760-cgu.c
407
.gate = { CGU_REG_OPCR, 7, true, 50 },
drivers/clk/ingenic/jz4760-cgu.c
419
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/jz4770-cgu.c
195
.gate = { CGU_REG_OPCR, 31, true }, // disable CCLK stop on idle
drivers/clk/ingenic/jz4770-cgu.c
420
.gate = { CGU_REG_OPCR, 7, true, 50 },
drivers/clk/ingenic/jz4770-cgu.c
440
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/jz4770-cgu.c
53
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4770-cgu.c
63
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4770-cgu.c
72
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4780-cgu.c
186
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4780-cgu.c
196
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4780-cgu.c
205
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/jz4780-cgu.c
548
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/x1000-cgu.c
136
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/x1000-cgu.c
146
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/x1000-cgu.c
155
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/x1000-cgu.c
451
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/x1830-cgu.c
352
.mux = { CGU_REG_OPCR, 2, 1},
drivers/clk/ingenic/x1830-cgu.c
59
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/x1830-cgu.c
69
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;
drivers/clk/ingenic/x1830-cgu.c
78
void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR;