ecb
__u8 ecb; /* 0x0061 */
vcpu->arch.sie_block->ecb |= ECB_HOSTPROTINT;
vcpu->arch.sie_block->ecb |= ECB_SRSI;
vcpu->arch.sie_block->ecb |= ECB_PTF;
vcpu->arch.sie_block->ecb |= ECB_TE;
vcpu->arch.sie_block->ecb |= ECB_SPECI;
vcpu->arch.sie_block->ecb |= ECB_GS;
#define IS_TE_ENABLED(vcpu) ((vcpu->arch.sie_block->ecb & ECB_TE))
vcpu->arch.sie_block->ecb |= ECB_GS;
const bool wants_tx = READ_ONCE(scb_o->ecb) & ECB_TE;
bool had_tx = scb_s->ecb & ECB_TE;
scb_s->ecb = 0;
scb_s->ecb |= scb_o->ecb & ECB_HOSTPROTINT;
scb_s->ecb |= scb_o->ecb & ECB_PTF;
scb_s->ecb |= ECB_TE;
scb_s->ecb |= scb_o->ecb & ECB_SPECI;
scb_s->ecb |= scb_o->ecb & ECB_GS;
if (!rc && (scb_s->ecb & ECB_TE))
if (gpa && (scb_s->ecb & ECB_TE)) {
if (((scb_s->ecb & ECB_GS) && !(scb_s->ecd & ECD_HOSTREGMGMT)) ||
struct pkt_control_ecb *ecb;
ecb = (struct pkt_control_ecb *)ce->pctrl;
ecb->control.op_mode = rctx->op_dir;
ecb->control.cipher_algorithm = ECB_AES;
ecb->cipher.header_len = 0;
ecb->cipher.algorithm_len = areq->cryptlen;
cpu_to_be32_array((__be32 *)ecb->key, (u32 *)op->key, op->keylen / 4);
rctx->h = &ecb->cipher;
ecb->control.aesnk = op->keylen / 4;
unsigned int ecb:1;
if (rctx->ecb)
if (!rctx->ecb) {
if (!rctx->ecb) {
static int mxs_dcp_aes_enqueue(struct skcipher_request *req, int enc, int ecb)
rctx->ecb = ecb;
return (struct ecb *)(((char *) hdata->ecb) + (unsigned int) offset);
offset = (char *) cpu - (char *) hdata->ecb;
struct ecb *ecbptr;
memset(ecbptr,0,sizeof(struct ecb));
if (!host->ecb[ecbno].cmdw)
if (host->ecb[ecbno].cmdw)
host->ecb[ecbno].cmdw = AHA1740CMD_INIT; /* SCSI Initiator Command
host->ecb[ecbno].cdblen = SCpnt->cmd_len; /* SCSI Command
memcpy(host->ecb[ecbno].cdb, cmd, SCpnt->cmd_len);
host->ecb[ecbno].sg = 1; /* SCSI Initiator Command
host->ecb[ecbno].datalen = nseg * sizeof(struct aha1740_chain);
host->ecb[ecbno].dataptr = sg_dma;
host->ecb[ecbno].datalen = 0;
host->ecb[ecbno].dataptr = 0;
host->ecb[ecbno].lun = SCpnt->device->lun;
host->ecb[ecbno].ses = 1; /* Suppress underrun errors */
host->ecb[ecbno].dir = direction;
host->ecb[ecbno].ars = 1; /* Yes, get the sense on an error */
host->ecb[ecbno].senselen = 12;
host->ecb[ecbno].senseptr = ecb_cpu_to_dma (SCpnt->device->host,
host->ecb[ecbno].sense);
host->ecb[ecbno].statusptr = ecb_cpu_to_dma (SCpnt->device->host,
host->ecb[ecbno].status);
host->ecb[ecbno].done = done;
host->ecb[ecbno].SCpnt = SCpnt;
for (i = 0; i < sizeof(host->ecb[ecbno]) - 10; i++)
printk("%02x ", ((unchar *)&host->ecb[ecbno])[i]);
outl (ecb_cpu_to_dma (SCpnt->device->host, host->ecb + ecbno),
host->ecb_dma_addr = dma_map_single (&edev->dev, host->ecb,
sizeof (host->ecb),
sizeof (host->ecb), DMA_BIDIRECTIONAL);
sizeof (host->ecb), DMA_BIDIRECTIONAL);
struct ecb ecb[AHA1740_ECBS];
static inline struct ecb *ecb_dma_to_cpu (struct Scsi_Host *host,
__u8 ecb; /* 0x0061 */
EXPECT_EQ(0, self->sie_block->ecb & ECB_SPECI);