e1000_read_nvm
e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
ret_val = e1000_read_nvm(hw, 0x23, 1, &data);
ret_val = e1000_read_nvm(hw, first_word,
ret_val = e1000_read_nvm(hw, first_word + i, 1,
ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
ret_val = e1000_read_nvm(hw, last_word, 1,
if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, ®_data);
ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1),
ret_val = e1000_read_nvm(hw, word, 1, &data);
ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg);
ret_val = e1000_read_nvm(hw, NVM_COMPAT, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1,
ret_val = e1000_read_nvm(hw, offset, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
ret_val = e1000_read_nvm(&adapter->hw,
ret_val = e1000_read_nvm(&adapter->hw,
ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
ret_val = e1000_read_nvm(hw, pba_ptr, 1, &length);
ret_val = e1000_read_nvm(hw, pba_ptr + offset, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);
ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);