drivers/gpu/drm/display/drm_dp_helper.c

4908

drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(max_link_rate));

drivers/gpu/drm/display/drm_dp_mst_topology.c

3598

drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));

drivers/gpu/drm/i915/display/intel_dp.c

131

return drm_dp_is_uhbr_rate(crtc_state->port_clock);

drivers/gpu/drm/i915/display/intel_dp.c

143

return drm_dp_is_uhbr_rate(rate) ? 32 : 10;

drivers/gpu/drm/i915/display/intel_dp.c

1556

if (!drm_dp_is_uhbr_rate(max_link_clock))

drivers/gpu/drm/i915/display/intel_dp.c

2172

if (drm_dp_is_uhbr_rate(link_rate)) {

drivers/gpu/drm/i915/display/intel_dp.c

432

if (drm_dp_is_uhbr_rate(link_clock))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1387

if (drm_dp_is_uhbr_rate(current_rate) != drm_dp_is_uhbr_rate(new_rate))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

723

link_config[1] = drm_dp_is_uhbr_rate(link_rate) ?

drivers/gpu/drm/i915/display/intel_dp_mst.c

1566

if (!drm_dp_is_uhbr_rate(max_link_clock))

drivers/gpu/drm/i915/display/intel_dp_mst.c

505

if (is_uhbr_sink && !drm_dp_is_uhbr_rate(limits->max_rate))