arch/arm/include/asm/arch_gicv3.h

77

dsb(sy);

arch/arm/include/asm/assembler.h

116

.macro dsb, args

arch/arm/include/asm/barrier.h

58

#define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)

arch/arm/include/asm/barrier.h

60

#define __arm_heavy_mb(x...) dsb(x)

arch/arm/include/asm/barrier.h

65

#define rmb() dsb()

arch/arm/include/asm/cacheflush.h

208

dsb(ishst);

arch/arm/include/asm/cacheflush.h

340

dsb(ishst);

arch/arm/include/asm/spinlock.h

44

dsb(ishst);

arch/arm/include/asm/switch_to.h

15

#define __complete_pending_tlbi() dsb(ish)

arch/arm/include/asm/tlbflush.h

332

dsb(nshst);

arch/arm/include/asm/tlbflush.h

338

dsb(nsh);

arch/arm/include/asm/tlbflush.h

349

dsb(ishst);

arch/arm/include/asm/tlbflush.h

355

dsb(ish);

arch/arm/include/asm/tlbflush.h

385

dsb(nshst);

arch/arm/include/asm/tlbflush.h

391

dsb(nsh);

arch/arm/include/asm/tlbflush.h

399

dsb(ishst);

arch/arm/include/asm/tlbflush.h

409

dsb(ish);

arch/arm/include/asm/tlbflush.h

442

dsb(nshst);

arch/arm/include/asm/tlbflush.h

448

dsb(nsh);

arch/arm/include/asm/tlbflush.h

459

dsb(ishst);

arch/arm/include/asm/tlbflush.h

469

dsb(ish);

arch/arm/include/asm/tlbflush.h

495

dsb(nshst);

arch/arm/include/asm/tlbflush.h

501

dsb(nsh);

arch/arm/include/asm/tlbflush.h

513

dsb(ishst);

arch/arm/include/asm/tlbflush.h

519

dsb(ish);

arch/arm/include/asm/tlbflush.h

578

dsb(ishst);

arch/arm/kernel/smp_tlb.c

83

dsb(ish);

arch/arm/kernel/smp_tlb.c

90

dsb(ish);

arch/arm/kernel/v7m.c

12

dsb();

arch/arm/kernel/v7m.c

15

dsb();

arch/arm/mach-bcm/platsmp.c

309

dsb(sy);

arch/arm/mach-exynos/pm.c

242

dsb();

arch/arm/mach-exynos/pm.c

311

dsb();

arch/arm/mach-meson/platsmp.c

303

dsb();

arch/arm/mach-mvebu/pm.c

47

dsb();

arch/arm/mach-mvebu/pmsu.c

281

dsb();

arch/arm/mach-rockchip/rockchip.c

38

dsb();

arch/arm/mach-shmobile/platsmp-apmu.c

115

dsb();

arch/arm/mach-shmobile/platsmp-scu.c

53

dsb();

arch/arm/mach-tegra/sleep.h

103

dsb

arch/arm/mm/cache-b15-rac.c

99

dsb();

arch/arm/mm/cache-feroceon-l2.c

195

dsb();

arch/arm/mm/cache-feroceon-l2.c

214

dsb();

arch/arm/mm/cache-feroceon-l2.c

229

dsb();

arch/arm/mm/cache-l2x0.c

141

dsb(st);

arch/arm/mm/cache-l2x0.c

1454

dsb(st);

arch/arm/mm/cache-tauros2.c

103

dsb();

arch/arm/mm/cache-tauros2.c

114

dsb();

arch/arm/mm/cache-tauros2.c

92

dsb();

arch/arm/mm/cache-xsc3l2.c

127

dsb();

arch/arm/mm/cache-xsc3l2.c

145

dsb();

arch/arm/mm/cache-xsc3l2.c

165

dsb();

arch/arm/mm/cache-xsc3l2.c

189

dsb();

arch/arm/mm/cache-xsc3l2.c

55

dsb();

arch/arm/mm/pmsa-v7.c

390

dsb(); /* Ensure all previous data accesses occur with old mappings */

arch/arm/mm/pmsa-v8.c

147

dsb();

arch/arm64/include/asm/arch_gicv3.h

40

dsb(sy);

arch/arm64/include/asm/assembler.h

106

dsb nsh

arch/arm64/include/asm/assembler.h

446

dsb \domain

arch/arm64/include/asm/assembler.h

466

dsb ish

arch/arm64/include/asm/assembler.h

496

dsb nsh

arch/arm64/include/asm/assembler.h

752

dsb nsh

arch/arm64/include/asm/barrier.h

63

#define __mb() dsb(sy)

arch/arm64/include/asm/barrier.h

64

#define __rmb() dsb(ld)

arch/arm64/include/asm/barrier.h

65

#define __wmb() dsb(st)

arch/arm64/include/asm/cache.h

92

dsb(sy);

arch/arm64/include/asm/cacheflush.h

141

dsb(ish);

arch/arm64/include/asm/mte.h

274

dsb(nsh);

arch/arm64/include/asm/pgtable.h

59

dsb(ishst);

arch/arm64/include/asm/smp.h

129

dsb(ishst);

arch/arm64/include/asm/sysreg.h

1123

dsb nsh

arch/arm64/include/asm/tlbflush.h

209

dsb(ish); \

arch/arm64/include/asm/tlbflush.h

218

dsb(ish);

arch/arm64/include/asm/tlbflush.h

228

dsb(ish);

arch/arm64/include/asm/tlbflush.h

315

dsb(nshst);

arch/arm64/include/asm/tlbflush.h

317

dsb(nsh);

arch/arm64/include/asm/tlbflush.h

323

dsb(ishst);

arch/arm64/include/asm/tlbflush.h

333

dsb(ishst);

arch/arm64/include/asm/tlbflush.h

530

dsb(ishst);

arch/arm64/include/asm/tlbflush.h

532

dsb(nshst);

arch/arm64/include/asm/tlbflush.h

562

dsb(nsh);

arch/arm64/include/asm/tlbflush.h

618

dsb(ishst);

arch/arm64/include/asm/tlbflush.h

633

dsb(ishst);

arch/arm64/kernel/alternative.c

190

dsb(ish);

arch/arm64/kernel/armv8_deprecated.c

280

dsb(sy);

arch/arm64/kernel/idle.c

29

dsb(sy);

arch/arm64/kernel/mte.c

276

dsb(ish);

arch/arm64/kernel/mte.c

363

dsb(nsh);

arch/arm64/kernel/pi/map_kernel.c

120

dsb(ishst);

arch/arm64/kernel/pi/map_kernel.c

137

dsb(ishst);

arch/arm64/kernel/pi/map_kernel.c

180

dsb(ishst);

arch/arm64/kernel/pi/map_kernel.c

191

dsb(ishst);

arch/arm64/kernel/pi/map_kernel.c

213

dsb(ishst);

arch/arm64/kernel/pi/map_kernel.c

97

dsb(ishst);

arch/arm64/kernel/process.c

755

dsb(ish);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

109

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

40

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

96

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/mem_protect.c

350

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/mm.c

240

dsb(ishst);

arch/arm64/kvm/hyp/nvhe/mm.c

272

dsb(ishst);

arch/arm64/kvm/hyp/nvhe/switch.c

302

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/switch.c

346

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/tlb.c

169

dsb(ish);

arch/arm64/kvm/hyp/nvhe/tlb.c

198

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/tlb.c

200

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/tlb.c

225

dsb(ish);

arch/arm64/kvm/hyp/nvhe/tlb.c

256

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/tlb.c

265

dsb(ish);

arch/arm64/kvm/hyp/nvhe/tlb.c

49

dsb(nsh);

arch/arm64/kvm/hyp/nvhe/tlb.c

51

dsb(ish);

arch/arm64/kvm/hyp/pgtable.c

1119

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

1302

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

1566

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

1594

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

464

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

487

dsb(ishst);

arch/arm64/kvm/hyp/pgtable.c

494

dsb(ishst);

arch/arm64/kvm/hyp/vgic-v3-sr.c

217

dsb(sy);

arch/arm64/kvm/hyp/vgic-v3-sr.c

275

dsb(sy);

arch/arm64/kvm/hyp/vgic-v3-sr.c

314

dsb(sy);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

230

dsb(nsh);

arch/arm64/kvm/hyp/vhe/tlb.c

115

dsb(ish);

arch/arm64/kvm/hyp/vhe/tlb.c

128

dsb(nshst);

arch/arm64/kvm/hyp/vhe/tlb.c

146

dsb(nsh);

arch/arm64/kvm/hyp/vhe/tlb.c

148

dsb(nsh);

arch/arm64/kvm/hyp/vhe/tlb.c

167

dsb(ishst);

arch/arm64/kvm/hyp/vhe/tlb.c

175

dsb(ish);

arch/arm64/kvm/hyp/vhe/tlb.c

187

dsb(ishst);

arch/arm64/kvm/hyp/vhe/tlb.c

208

dsb(nsh);

arch/arm64/kvm/hyp/vhe/tlb.c

216

dsb(ishst);

arch/arm64/kvm/hyp/vhe/tlb.c

97

dsb(ishst);

arch/arm64/kvm/vgic/vgic-v5.c

525

dsb(sy);

arch/arm64/kvm/vgic/vgic-v5.c

534

dsb(sy);

arch/arm64/mm/kasan_init.c

337

dsb(ishst);

arch/arm64/mm/mmu.c

164

dsb(ishst);

arch/arm64/mm/mmu.c

614

dsb(ishst);

arch/arm64/mm/mmu.c

661

dsb(ishst);

arch/arm64/mm/mmu.c

80

dsb(ishst);

drivers/firmware/efi/libstub/arm64.c

113

dsb(ish);

drivers/gpu/drm/i915/display/i9xx_plane.c

438

static void i9xx_plane_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/i9xx_plane.c

467

static void i9xx_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/i9xx_plane.c

522

static void i830_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/i9xx_plane.c

533

i9xx_plane_update_noarm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/i9xx_plane.c

534

i9xx_plane_update_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/i9xx_plane.c

537

static void i9xx_plane_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/i9xx_plane.c

600

g4x_primary_async_flip(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/i9xx_plane.c

618

vlv_primary_async_flip(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1001

icl_load_csc_matrix(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1004

static void skl_color_commit_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1018

ilk_load_csc_matrix(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1021

static void ilk_color_commit_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1024

ilk_load_csc_matrix(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1027

static void i9xx_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1034

static void ilk_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1047

static void hsw_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1120

static void skl_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1129

ilk_load_csc_matrix(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1140

intel_de_write_dsb(display, dsb, SKL_BOTTOM_COLOR(pipe), val);

drivers/gpu/drm/i915/display/intel_color.c

1142

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1144

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1147

static void icl_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1158

intel_de_write_dsb(display, dsb, SKL_BOTTOM_COLOR(pipe), 0);

drivers/gpu/drm/i915/display/intel_color.c

1160

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1162

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1939

void intel_color_commit_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1945

display->funcs.color->color_commit_noarm(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1948

void intel_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

1953

display->funcs.color->color_commit_arm(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

224

static void ilk_update_pipe_csc(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

231

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

233

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

235

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

238

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RY_GY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

240

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

243

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RU_GU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

245

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

248

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RV_GV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

250

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

256

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

258

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

260

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

330

static void icl_update_output_csc(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

337

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

339

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

341

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

344

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

346

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

349

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

351

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

354

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

356

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

359

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

361

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

363

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3852

xelpd_load_plane_csc_matrix(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

3913

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3915

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 1),

drivers/gpu/drm/i915/display/intel_color.c

3918

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 2),

drivers/gpu/drm/i915/display/intel_color.c

3920

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 3),

drivers/gpu/drm/i915/display/intel_color.c

3923

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 4),

drivers/gpu/drm/i915/display/intel_color.c

3925

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 5),

drivers/gpu/drm/i915/display/intel_color.c

3928

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

3929

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 1), 0);

drivers/gpu/drm/i915/display/intel_color.c

3930

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 2), 0);

drivers/gpu/drm/i915/display/intel_color.c

3935

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3938

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3941

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3947

xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

3960

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3968

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3976

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3984

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3989

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

3995

intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4000

xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4011

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4014

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4021

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

4028

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

4038

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

4043

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

4049

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4050

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_color.c

4056

xelpd_plane_load_luts(struct intel_dsb *dsb, const struct intel_plane_state *plane_state)

drivers/gpu/drm/i915/display/intel_color.c

4059

xelpd_program_plane_pre_csc_lut(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4062

xelpd_program_plane_post_csc_lut(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4072

static void glk_load_lut_3d(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4081

if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {

drivers/gpu/drm/i915/display/intel_color.c

4087

intel_de_write_dsb(display, dsb, LUT_3D_INDEX(pipe), LUT_3D_AUTO_INCREMENT);

drivers/gpu/drm/i915/display/intel_color.c

4089

intel_de_write_dsb(display, dsb, LUT_3D_DATA(pipe), glk_3dlut_10(&lut[i]));

drivers/gpu/drm/i915/display/intel_color.c

4090

intel_de_write_dsb(display, dsb, LUT_3D_INDEX(pipe), 0);

drivers/gpu/drm/i915/display/intel_color.c

4093

static void glk_lut_3d_commit(struct intel_dsb *dsb, struct intel_crtc *crtc, bool enable)

drivers/gpu/drm/i915/display/intel_color.c

4099

if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {

drivers/gpu/drm/i915/display/intel_color.c

4108

intel_de_write_dsb(display, dsb, LUT_3D_CTL(pipe), val);

drivers/gpu/drm/i915/display/intel_color.c

4240

void intel_color_plane_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4247

glk_lut_3d_commit(dsb, crtc, !!plane_state->hw.lut_3d);

drivers/gpu/drm/i915/display/intel_color.c

4251

intel_color_load_plane_csc_matrix(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4257

display->funcs.color->load_plane_csc_matrix(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4261

intel_color_load_plane_luts(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4267

display->funcs.color->load_plane_luts(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4280

intel_color_load_3dlut(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4287

glk_load_lut_3d(dsb, crtc, plane_state->hw.lut_3d);

drivers/gpu/drm/i915/display/intel_color.c

4290

void intel_color_plane_program_pipeline(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

4294

intel_color_load_plane_csc_matrix(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4296

intel_color_load_plane_luts(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4298

intel_color_load_3dlut(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

48

void (*color_commit_noarm)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

559

static void ilk_load_csc_matrix(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

565

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

57

void (*color_commit_arm)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

597

static void icl_load_csc_matrix(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

603

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

606

icl_update_output_csc(dsb, crtc, &crtc_state->output_csc);

drivers/gpu/drm/i915/display/intel_color.c

94

void (*load_plane_csc_matrix)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

98

void (*load_plane_luts)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.c

990

static void icl_color_commit_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.h

32

void intel_color_commit_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.h

34

void intel_color_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.h

45

void intel_color_plane_program_pipeline(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_color.h

47

void intel_color_plane_commit_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

275

static void i845_cursor_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

316

static void i845_cursor_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

320

i845_cursor_update_arm(dsb, plane, crtc_state, NULL);

drivers/gpu/drm/i915/display/intel_cursor.c

533

static void i9xx_cursor_disable_sel_fetch_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

543

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_cursor.c

546

static void wa_16021440873(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

559

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

561

intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

565

static void i9xx_cursor_update_sel_fetch_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

581

intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe), val);

drivers/gpu/drm/i915/display/intel_cursor.c

584

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), plane_state->ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

588

wa_16021440873(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

590

i9xx_cursor_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

617

static void skl_write_cursor_wm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

630

intel_de_write_dsb(display, dsb, CUR_WM(pipe, level),

drivers/gpu/drm/i915/display/intel_cursor.c

633

intel_de_write_dsb(display, dsb, CUR_WM_TRANS(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

639

intel_de_write_dsb(display, dsb, CUR_WM_SAGV(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

641

intel_de_write_dsb(display, dsb, CUR_WM_SAGV_TRANS(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

645

intel_de_write_dsb(display, dsb, CUR_BUF_CFG(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

650

static void i9xx_cursor_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

694

skl_write_cursor_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

697

i9xx_cursor_update_sel_fetch_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_cursor.c

699

i9xx_cursor_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_cursor.c

705

intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

706

intel_de_write_dsb(display, dsb, CURCNTR(display, pipe), cntl);

drivers/gpu/drm/i915/display/intel_cursor.c

707

intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);

drivers/gpu/drm/i915/display/intel_cursor.c

708

intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);

drivers/gpu/drm/i915/display/intel_cursor.c

714

intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);

drivers/gpu/drm/i915/display/intel_cursor.c

715

intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);

drivers/gpu/drm/i915/display/intel_cursor.c

719

static void i9xx_cursor_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_cursor.c

723

i9xx_cursor_update_arm(dsb, plane, crtc_state, NULL);

drivers/gpu/drm/i915/display/intel_de.h

161

intel_de_write_dsb(struct intel_display *display, struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_de.h

164

if (dsb)

drivers/gpu/drm/i915/display/intel_de.h

165

intel_dsb_reg_write(dsb, reg, val);

drivers/gpu/drm/i915/display/intel_display.c

139

static void bdw_set_pipe_misc(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_display.c

3269

static void bdw_set_pipe_misc(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_display.c

3317

intel_de_write_dsb(display, dsb, PIPE_MISC(crtc->pipe), val);

drivers/gpu/drm/i915/display/intel_display_types.h

1617

void (*update_noarm)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_display_types.h

1622

void (*update_arm)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_display_types.h

1627

void (*disable_arm)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_display_types.h

1639

void (*async_flip)(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dmc.c

1762

void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dmc.c

1767

intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dmc.c

1771

void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_dmc.c

1776

intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_dmc.h

45

void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dmc.h

46

void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

101

return display->parent->dsb->read(dsb->dsb_buf, idx);

drivers/gpu/drm/i915/display/intel_dsb.c

1023

struct intel_dsb *dsb;

drivers/gpu/drm/i915/display/intel_dsb.c

1032

dsb = kzalloc_obj(*dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

1033

if (!dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

104

static void dsb_buffer_fill(struct intel_dsb *dsb, u32 idx, u32 val, size_t size)

drivers/gpu/drm/i915/display/intel_dsb.c

1045

dsb->dsb_buf = dsb_buf;

drivers/gpu/drm/i915/display/intel_dsb.c

1049

dsb->id = dsb_id;

drivers/gpu/drm/i915/display/intel_dsb.c

1050

dsb->crtc = crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

1051

dsb->size = size / 4; /* in dwords */

drivers/gpu/drm/i915/display/intel_dsb.c

1053

dsb->chicken = dsb_chicken(state, crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

1054

dsb->hw_dewake_scanline =

drivers/gpu/drm/i915/display/intel_dsb.c

1057

return dsb;

drivers/gpu/drm/i915/display/intel_dsb.c

106

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

1061

kfree(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

1077

void intel_dsb_cleanup(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

1079

dsb_buffer_cleanup(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

108

display->parent->dsb->fill(dsb->dsb_buf, idx, val, size);

drivers/gpu/drm/i915/display/intel_dsb.c

1080

kfree(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

113

return display->parent->dsb->create(display->drm, size);

drivers/gpu/drm/i915/display/intel_dsb.c

116

static void dsb_buffer_cleanup(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

118

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

120

display->parent->dsb->cleanup(dsb->dsb_buf);

drivers/gpu/drm/i915/display/intel_dsb.c

123

static void dsb_buffer_flush_map(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

125

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

127

display->parent->dsb->flush_map(dsb->dsb_buf);

drivers/gpu/drm/i915/display/intel_dsb.c

241

static bool assert_dsb_has_room(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

243

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

247

return !drm_WARN(display->drm, dsb->free_pos > dsb->size - 2,

drivers/gpu/drm/i915/display/intel_dsb.c

249

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

252

static bool assert_dsb_tail_is_aligned(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

254

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

258

!IS_ALIGNED(dsb->free_pos * 4, CACHELINE_BYTES));

drivers/gpu/drm/i915/display/intel_dsb.c

261

static void intel_dsb_dump(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

263

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

268

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

269

for (i = 0; i < ALIGN(dsb->free_pos, 64 / 4); i += 4)

drivers/gpu/drm/i915/display/intel_dsb.c

272

dsb_buffer_read(dsb, i),

drivers/gpu/drm/i915/display/intel_dsb.c

273

dsb_buffer_read(dsb, i + 1),

drivers/gpu/drm/i915/display/intel_dsb.c

274

dsb_buffer_read(dsb, i + 2),

drivers/gpu/drm/i915/display/intel_dsb.c

275

dsb_buffer_read(dsb, i + 3));

drivers/gpu/drm/i915/display/intel_dsb.c

285

unsigned int intel_dsb_size(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

287

return dsb->free_pos * 4;

drivers/gpu/drm/i915/display/intel_dsb.c

290

unsigned int intel_dsb_head(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

292

return dsb_buffer_ggtt_offset(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

295

static unsigned int intel_dsb_tail(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

297

return dsb_buffer_ggtt_offset(dsb) + intel_dsb_size(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

300

static void intel_dsb_ins_align(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

310

dsb->free_pos = ALIGN(dsb->free_pos, 2);

drivers/gpu/drm/i915/display/intel_dsb.c

313

static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)

drivers/gpu/drm/i915/display/intel_dsb.c

315

if (!assert_dsb_has_room(dsb))

drivers/gpu/drm/i915/display/intel_dsb.c

318

intel_dsb_ins_align(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

320

dsb->ins_start_offset = dsb->free_pos;

drivers/gpu/drm/i915/display/intel_dsb.c

321

dsb->ins[0] = ldw;

drivers/gpu/drm/i915/display/intel_dsb.c

322

dsb->ins[1] = udw;

drivers/gpu/drm/i915/display/intel_dsb.c

324

dsb_buffer_write(dsb, dsb->free_pos++, dsb->ins[0]);

drivers/gpu/drm/i915/display/intel_dsb.c

325

dsb_buffer_write(dsb, dsb->free_pos++, dsb->ins[1]);

drivers/gpu/drm/i915/display/intel_dsb.c

328

static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

338

if (dsb->free_pos == 0)

drivers/gpu/drm/i915/display/intel_dsb.c

341

prev_opcode = dsb->ins[1] & ~DSB_REG_VALUE_MASK;

drivers/gpu/drm/i915/display/intel_dsb.c

342

prev_reg = dsb->ins[1] & DSB_REG_VALUE_MASK;

drivers/gpu/drm/i915/display/intel_dsb.c

347

static bool intel_dsb_prev_ins_is_indexed_write(struct intel_dsb *dsb, i915_reg_t reg)

drivers/gpu/drm/i915/display/intel_dsb.c

349

return intel_dsb_prev_ins_is_write(dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

367

void intel_dsb_reg_write_indexed(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

386

if (!intel_dsb_prev_ins_is_indexed_write(dsb, reg))

drivers/gpu/drm/i915/display/intel_dsb.c

387

intel_dsb_emit(dsb, 0, /* count */

drivers/gpu/drm/i915/display/intel_dsb.c

391

if (!assert_dsb_has_room(dsb))

drivers/gpu/drm/i915/display/intel_dsb.c

395

dsb->ins[0]++;

drivers/gpu/drm/i915/display/intel_dsb.c

396

dsb_buffer_write(dsb, dsb->ins_start_offset + 0, dsb->ins[0]);

drivers/gpu/drm/i915/display/intel_dsb.c

398

dsb_buffer_write(dsb, dsb->free_pos++, val);

drivers/gpu/drm/i915/display/intel_dsb.c

400

if (dsb->free_pos & 0x1)

drivers/gpu/drm/i915/display/intel_dsb.c

401

dsb_buffer_write(dsb, dsb->free_pos, 0);

drivers/gpu/drm/i915/display/intel_dsb.c

404

void intel_dsb_reg_write(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

407

intel_dsb_emit(dsb, val,

drivers/gpu/drm/i915/display/intel_dsb.c

422

void intel_dsb_reg_write_masked(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

425

intel_dsb_emit(dsb, val,

drivers/gpu/drm/i915/display/intel_dsb.c

431

void intel_dsb_noop(struct intel_dsb *dsb, int count)

drivers/gpu/drm/i915/display/intel_dsb.c

436

intel_dsb_emit(dsb, 0,

drivers/gpu/drm/i915/display/intel_dsb.c

440

void intel_dsb_nonpost_start(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

442

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

445

intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

447

intel_dsb_noop(dsb, 4);

drivers/gpu/drm/i915/display/intel_dsb.c

450

void intel_dsb_nonpost_end(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

452

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

455

intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

457

intel_dsb_noop(dsb, 4);

drivers/gpu/drm/i915/display/intel_dsb.c

460

void intel_dsb_interrupt(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

462

intel_dsb_emit(dsb, 0,

drivers/gpu/drm/i915/display/intel_dsb.c

466

void intel_dsb_wait_usec(struct intel_dsb *dsb, int count)

drivers/gpu/drm/i915/display/intel_dsb.c

469

intel_dsb_emit(dsb, count + 1,

drivers/gpu/drm/i915/display/intel_dsb.c

473

void intel_dsb_wait_vblanks(struct intel_dsb *dsb, int count)

drivers/gpu/drm/i915/display/intel_dsb.c

475

intel_dsb_emit(dsb, count,

drivers/gpu/drm/i915/display/intel_dsb.c

479

static void intel_dsb_emit_wait_dsl(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

485

intel_dsb_emit(dsb, lower_32_bits(window),

drivers/gpu/drm/i915/display/intel_dsb.c

491

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

495

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

504

intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_IN,

drivers/gpu/drm/i915/display/intel_dsb.c

507

intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT,

drivers/gpu/drm/i915/display/intel_dsb.c

514

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

517

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

526

crtc->base.base.id, crtc->base.name, dsb->id,

drivers/gpu/drm/i915/display/intel_dsb.c

531

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

534

assert_dsl_ok(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

536

intel_dsb_wait_dsl(state, dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

542

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

545

assert_dsl_ok(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

547

intel_dsb_wait_dsl(state, dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

552

void intel_dsb_poll(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

556

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

559

intel_dsb_reg_write(dsb, DSB_POLLMASK(pipe, dsb->id), mask);

drivers/gpu/drm/i915/display/intel_dsb.c

560

intel_dsb_reg_write(dsb, DSB_POLLFUNC(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

564

intel_dsb_noop(dsb, 5);

drivers/gpu/drm/i915/display/intel_dsb.c

566

intel_dsb_emit(dsb, val,

drivers/gpu/drm/i915/display/intel_dsb.c

571

static void intel_dsb_align_tail(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

575

intel_dsb_ins_align(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

577

tail = dsb->free_pos * 4;

drivers/gpu/drm/i915/display/intel_dsb.c

581

dsb_buffer_fill(dsb, dsb->free_pos, 0, aligned_tail - tail);

drivers/gpu/drm/i915/display/intel_dsb.c

583

dsb->free_pos = aligned_tail / 4;

drivers/gpu/drm/i915/display/intel_dsb.c

586

static void intel_dsb_gosub_align(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

590

intel_dsb_ins_align(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

592

tail = dsb->free_pos * 4;

drivers/gpu/drm/i915/display/intel_dsb.c

600

dsb_buffer_fill(dsb, dsb->free_pos, 0, aligned_tail - tail);

drivers/gpu/drm/i915/display/intel_dsb.c

602

dsb->free_pos = aligned_tail / 4;

drivers/gpu/drm/i915/display/intel_dsb.c

605

void intel_dsb_gosub(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

608

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

613

if (drm_WARN_ON(display->drm, dsb->id != sub_dsb->id))

drivers/gpu/drm/i915/display/intel_dsb.c

619

intel_dsb_gosub_align(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

643

intel_dsb_emit(dsb, lower_32_bits(head_tail),

drivers/gpu/drm/i915/display/intel_dsb.c

651

intel_dsb_align_tail(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

654

void intel_dsb_gosub_finish(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

656

intel_dsb_align_tail(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

662

intel_dsb_noop(dsb, 8);

drivers/gpu/drm/i915/display/intel_dsb.c

664

dsb_buffer_flush_map(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

667

void intel_dsb_finish(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

669

intel_dsb_align_tail(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

671

dsb_buffer_flush_map(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

741

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

743

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

760

intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT, 0, 0);

drivers/gpu/drm/i915/display/intel_dsb.c

771

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

779

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

785

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

790

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

796

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

800

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

806

intel_dsb_wait_scanline_out(state, dsb, start, end);

drivers/gpu/drm/i915/display/intel_dsb.c

811

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

816

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

819

if (drm_WARN_ON(display->drm, dsb->id == chained_dsb->id))

drivers/gpu/drm/i915/display/intel_dsb.c

825

intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

828

intel_dsb_reg_write(dsb, DSB_CHICKEN(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

83

static u32 dsb_buffer_ggtt_offset(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

831

intel_dsb_reg_write(dsb, DSB_INTERRUPT(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

839

intel_dsb_reg_write(dsb, DSB_PMCTRL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

843

intel_dsb_reg_write(dsb, DSB_PMCTRL(pipe, chained_dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

846

intel_dsb_reg_write(dsb, DSB_HEAD(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

849

intel_dsb_reg_write(dsb, DSB_TAIL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

85

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

859

intel_dsb_reg_write_masked(dsb, DSB_PMCTRL_2(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

862

intel_dsb_wait_scanline_out(state, dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

87

return display->parent->dsb->ggtt_offset(dsb->dsb_buf);

drivers/gpu/drm/i915/display/intel_dsb.c

870

intel_dsb_reg_write_masked(dsb, DSB_PMCTRL_2(crtc->pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

876

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

880

_intel_dsb_chain(state, dsb, chained_dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

885

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

887

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

90

static void dsb_buffer_write(struct intel_dsb *dsb, u32 idx, u32 val)

drivers/gpu/drm/i915/display/intel_dsb.c

906

intel_dsb_wait_scanline_out(state, dsb,

drivers/gpu/drm/i915/display/intel_dsb.c

92

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

920

intel_dsb_wait_usec(dsb, intel_scanlines_to_usecs(adjusted_mode, wait_scanlines));

drivers/gpu/drm/i915/display/intel_dsb.c

929

void intel_dsb_commit(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

931

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

935

if (!assert_dsb_tail_is_aligned(dsb))

drivers/gpu/drm/i915/display/intel_dsb.c

938

if (is_dsb_busy(display, pipe, dsb->id)) {

drivers/gpu/drm/i915/display/intel_dsb.c

94

display->parent->dsb->write(dsb->dsb_buf, idx, val);

drivers/gpu/drm/i915/display/intel_dsb.c

940

crtc->base.base.id, crtc->base.name, dsb->id);

drivers/gpu/drm/i915/display/intel_dsb.c

944

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

947

intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

948

dsb->chicken);

drivers/gpu/drm/i915/display/intel_dsb.c

950

intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

954

intel_de_write_fw(display, DSB_PMCTRL(pipe, dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

956

intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

957

intel_dsb_head(dsb));

drivers/gpu/drm/i915/display/intel_dsb.c

959

intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

960

intel_dsb_tail(dsb));

drivers/gpu/drm/i915/display/intel_dsb.c

963

void intel_dsb_wait(struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_dsb.c

965

struct intel_crtc *crtc = dsb->crtc;

drivers/gpu/drm/i915/display/intel_dsb.c

97

static u32 dsb_buffer_read(struct intel_dsb *dsb, u32 idx)

drivers/gpu/drm/i915/display/intel_dsb.c

971

ret = poll_timeout_us(is_busy = is_dsb_busy(display, pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

975

u32 offset = dsb_buffer_ggtt_offset(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

977

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

982

crtc->base.base.id, crtc->base.name, dsb->id,

drivers/gpu/drm/i915/display/intel_dsb.c

983

intel_de_read_fw(display, DSB_CURRENT_HEAD(pipe, dsb->id)) - offset,

drivers/gpu/drm/i915/display/intel_dsb.c

984

intel_de_read_fw(display, DSB_HEAD(pipe, dsb->id)) - offset,

drivers/gpu/drm/i915/display/intel_dsb.c

985

intel_de_read_fw(display, DSB_TAIL(pipe, dsb->id)) - offset);

drivers/gpu/drm/i915/display/intel_dsb.c

987

intel_dsb_dump(dsb);

drivers/gpu/drm/i915/display/intel_dsb.c

99

struct intel_display *display = to_intel_display(dsb->crtc);

drivers/gpu/drm/i915/display/intel_dsb.c

991

dsb->free_pos = 0;

drivers/gpu/drm/i915/display/intel_dsb.c

992

dsb->ins_start_offset = 0;

drivers/gpu/drm/i915/display/intel_dsb.c

993

dsb->ins[0] = 0;

drivers/gpu/drm/i915/display/intel_dsb.c

994

dsb->ins[1] = 0;

drivers/gpu/drm/i915/display/intel_dsb.c

996

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

998

intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.h

29

unsigned int intel_dsb_size(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

30

unsigned int intel_dsb_head(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

35

void intel_dsb_finish(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

36

void intel_dsb_gosub_finish(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

37

void intel_dsb_cleanup(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

39

void intel_dsb_reg_write(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

41

void intel_dsb_reg_write_indexed(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

43

void intel_dsb_reg_write_masked(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

45

void intel_dsb_noop(struct intel_dsb *dsb, int count);

drivers/gpu/drm/i915/display/intel_dsb.h

46

void intel_dsb_nonpost_start(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

47

void intel_dsb_nonpost_end(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

48

void intel_dsb_interrupt(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

49

void intel_dsb_wait_usec(struct intel_dsb *dsb, int count);

drivers/gpu/drm/i915/display/intel_dsb.h

50

void intel_dsb_wait_vblanks(struct intel_dsb *dsb, int count);

drivers/gpu/drm/i915/display/intel_dsb.h

52

struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

54

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

57

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

60

struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

61

void intel_dsb_poll(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

64

void intel_dsb_gosub(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

67

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_dsb.h

71

void intel_dsb_commit(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_dsb.h

72

void intel_dsb_wait(struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_fbc.c

1380

intel_fbc_program_dirty_rect(struct intel_dsb *dsb, struct intel_fbc *fbc,

drivers/gpu/drm/i915/display/intel_fbc.c

1387

intel_de_write_dsb(display, dsb, XE3_FBC_DIRTY_RECT(fbc->id),

drivers/gpu/drm/i915/display/intel_fbc.c

1393

intel_fbc_dirty_rect_update(struct intel_dsb *dsb, struct intel_fbc *fbc)

drivers/gpu/drm/i915/display/intel_fbc.c

1402

intel_fbc_program_dirty_rect(dsb, fbc, fbc_dirty_rect);

drivers/gpu/drm/i915/display/intel_fbc.c

1406

intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_fbc.c

1418

intel_fbc_dirty_rect_update(dsb, fbc);

drivers/gpu/drm/i915/display/intel_fbc.h

57

void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_flipq.c

356

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_flipq.c

363

intel_flipq_write(display, flipq, intel_dsb_head(dsb), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

366

LNL_FQ_DSB_SIZE(intel_dsb_size(dsb) / 64), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

375

intel_flipq_write(display, flipq, intel_dsb_head(dsb), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

378

LNL_FQ_DSB_SIZE(intel_dsb_size(dsb) / 64), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

391

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_flipq.c

401

PTL_FQ_DSB_SIZE(intel_dsb_size(dsb) / 64), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

402

intel_flipq_write(display, flipq, intel_dsb_head(dsb), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

413

PTL_FQ_DSB_SIZE(intel_dsb_size(dsb) / 64), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

414

intel_flipq_write(display, flipq, intel_dsb_head(dsb), i++);

drivers/gpu/drm/i915/display/intel_flipq.c

426

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_flipq.c

439

ptl_flipq_add(display, flipq, pts, dsb_id, dsb);

drivers/gpu/drm/i915/display/intel_flipq.c

441

lnl_flipq_add(display, flipq, pts, dsb_id, dsb);

drivers/gpu/drm/i915/display/intel_flipq.c

451

void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

456

intel_dsb_wait_usec(dsb, 2);

drivers/gpu/drm/i915/display/intel_flipq.c

459

void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_flipq.c

464

intel_dsb_reg_write(dsb, PIPEDMC_CTL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.h

30

struct intel_dsb *dsb);

drivers/gpu/drm/i915/display/intel_flipq.h

32

void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_flipq.h

33

void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1017

intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

1019

intel_plane_disable_arm(dsb, plane, new_crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

1023

void intel_crtc_planes_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

1030

skl_crtc_planes_update_arm(dsb, state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

1032

i9xx_crtc_planes_update_arm(dsb, state, crtc);

drivers/gpu/drm/i915/display/intel_plane.c

877

void intel_plane_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

887

intel_fbc_dirty_rect_update_noarm(dsb, plane);

drivers/gpu/drm/i915/display/intel_plane.c

890

plane->update_noarm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

893

void intel_plane_async_flip(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

902

plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip);

drivers/gpu/drm/i915/display/intel_plane.c

905

void intel_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

913

intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true);

drivers/gpu/drm/i915/display/intel_plane.c

918

plane->update_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

921

void intel_plane_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

928

plane->disable_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

931

void intel_crtc_planes_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

957

intel_plane_update_noarm(dsb, plane,

drivers/gpu/drm/i915/display/intel_plane.c

962

static void skl_crtc_planes_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.c

990

intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);

drivers/gpu/drm/i915/display/intel_plane.c

992

intel_plane_disable_arm(dsb, plane, new_crtc_state);

drivers/gpu/drm/i915/display/intel_plane.c

996

static void i9xx_crtc_planes_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.h

42

void intel_plane_async_flip(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.h

47

void intel_plane_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.h

51

void intel_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.h

55

void intel_plane_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_plane.h

64

void intel_crtc_planes_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.c

2526

void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.c

2537

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_psr.c

2602

void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.c

2617

if (!dsb)

drivers/gpu/drm/i915/display/intel_psr.c

2625

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_psr.c

2632

intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),

drivers/gpu/drm/i915/display/intel_psr.c

2638

intel_dsc_su_et_parameters_configure(dsb, encoder, crtc_state,

drivers/gpu/drm/i915/display/intel_psr.c

3232

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_psr.c

3242

if (dsb) {

drivers/gpu/drm/i915/display/intel_psr.c

3243

intel_dsb_poll(dsb, EDP_PSR2_STATUS(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_psr.c

3257

struct intel_dsb *dsb)

drivers/gpu/drm/i915/display/intel_psr.c

3262

if (dsb) {

drivers/gpu/drm/i915/display/intel_psr.c

3263

intel_dsb_poll(dsb, psr_status_reg(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_psr.c

3313

void intel_psr_wait_for_idle_dsb(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.c

3320

_psr2_ready_for_pipe_update_locked(new_crtc_state, dsb);

drivers/gpu/drm/i915/display/intel_psr.c

3322

_psr1_ready_for_pipe_update_locked(new_crtc_state, dsb);

drivers/gpu/drm/i915/display/intel_psr.h

55

void intel_psr_wait_for_idle_dsb(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.h

60

void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_psr.h

76

void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

1135

g4x_sprite_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

1165

g4x_sprite_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

1206

g4x_sprite_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

366

vlv_sprite_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

388

vlv_sprite_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

435

vlv_sprite_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

789

ivb_sprite_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

820

ivb_sprite_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_sprite.c

865

ivb_sprite_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_vdsc.c

823

void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_vdsc.c

840

intel_de_write_dsb(display, dsb, LNL_DSC0_SU_PARAMETER_SET_0(pipe), val);

drivers/gpu/drm/i915/display/intel_vdsc.c

843

intel_de_write_dsb(display, dsb, LNL_DSC1_SU_PARAMETER_SET_0(pipe), val);

drivers/gpu/drm/i915/display/intel_vdsc.h

41

void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_vrr.c

712

void intel_vrr_send_push(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_vrr.c

721

if (dsb)

drivers/gpu/drm/i915/display/intel_vrr.c

722

intel_dsb_nonpost_start(dsb);

drivers/gpu/drm/i915/display/intel_vrr.c

724

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/intel_vrr.c

727

if (dsb)

drivers/gpu/drm/i915/display/intel_vrr.c

728

intel_dsb_nonpost_end(dsb);

drivers/gpu/drm/i915/display/intel_vrr.c

731

void intel_vrr_check_push_sent(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_vrr.c

746

if (dsb) {

drivers/gpu/drm/i915/display/intel_vrr.c

756

intel_dsb_poll(dsb, TRANS_PUSH(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_vrr.h

28

void intel_vrr_send_push(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/intel_vrr.h

30

void intel_vrr_check_push_sent(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

701

struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

706

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

720

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

724

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

741

struct intel_dsb *dsb, enum pipe pipe,

drivers/gpu/drm/i915/display/skl_scaler.c

748

glk_program_nearest_filter_coefs(display, dsb, pipe, id, set);

drivers/gpu/drm/i915/display/skl_scaler.c

862

skl_program_plane_scaler(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

913

skl_scaler_setup_filter(display, dsb, pipe, scaler_id, 0,

drivers/gpu/drm/i915/display/skl_scaler.c

916

intel_de_write_dsb(display, dsb, SKL_PS_CTRL(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

918

intel_de_write_dsb(display, dsb, SKL_PS_VPHASE(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

920

intel_de_write_dsb(display, dsb, SKL_PS_HPHASE(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

922

intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

924

intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

928

static void skl_detach_scaler(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

935

intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

936

intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

937

intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

943

void skl_detach_scalers(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.c

954

skl_detach_scaler(dsb, crtc, i);

drivers/gpu/drm/i915/display/skl_scaler.h

29

void skl_program_plane_scaler(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_scaler.h

33

void skl_detach_scalers(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1377

static void icl_plane_csc_load_black(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1385

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1386

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1388

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1389

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 3), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1391

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 4), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1392

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 5), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1394

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1395

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1396

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1398

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1399

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1400

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1404

skl_plane_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1424

intel_de_write_dsb(display, dsb, PLANE_STRIDE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1426

intel_de_write_dsb(display, dsb, PLANE_POS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1428

intel_de_write_dsb(display, dsb, PLANE_SIZE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1431

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1435

skl_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1459

intel_de_write_dsb(display, dsb, PLANE_KEYVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1461

intel_de_write_dsb(display, dsb, PLANE_KEYMSK(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1463

intel_de_write_dsb(display, dsb, PLANE_KEYMAX(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1466

intel_de_write_dsb(display, dsb, PLANE_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1469

intel_de_write_dsb(display, dsb, PLANE_AUX_DIST(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1472

intel_de_write_dsb(display, dsb, PLANE_AUX_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1477

intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1488

skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1495

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1497

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1501

static void icl_plane_update_sel_fetch_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1524

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_POS(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1539

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_OFFSET(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1544

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_SIZE(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1548

icl_plane_update_noarm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1570

intel_color_plane_program_pipeline(dsb, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1578

intel_de_write_dsb(display, dsb, PLANE_STRIDE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1580

intel_de_write_dsb(display, dsb, PLANE_POS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1582

intel_de_write_dsb(display, dsb, PLANE_SIZE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1585

intel_de_write_dsb(display, dsb, PLANE_KEYVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1587

intel_de_write_dsb(display, dsb, PLANE_KEYMSK(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1589

intel_de_write_dsb(display, dsb, PLANE_KEYMAX(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1592

intel_de_write_dsb(display, dsb, PLANE_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1596

intel_de_write_dsb(display, dsb, PLANE_CC_VAL(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1598

intel_de_write_dsb(display, dsb, PLANE_CC_VAL(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1604

intel_de_write_dsb(display, dsb, PLANE_AUX_DIST(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1608

intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1611

intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1615

icl_program_input_csc(dsb, plane, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1617

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1624

icl_plane_csc_load_black(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1626

icl_plane_update_sel_fetch_noarm(dsb, plane, crtc_state, plane_state, color_plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1629

static void icl_plane_update_sel_fetch_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1641

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1644

icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1648

icl_plane_update_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1669

skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1671

icl_plane_update_sel_fetch_arm(dsb, plane, crtc_state, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1673

intel_color_plane_commit_arm(dsb, plane_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1681

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1690

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1692

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1708

skl_plane_async_flip(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

1729

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1731

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

676

icl_program_input_csc(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

724

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

726

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

728

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2),

drivers/gpu/drm/i915/display/skl_universal_plane.c

730

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3),

drivers/gpu/drm/i915/display/skl_universal_plane.c

732

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4),

drivers/gpu/drm/i915/display/skl_universal_plane.c

734

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5),

drivers/gpu/drm/i915/display/skl_universal_plane.c

737

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

739

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

741

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 2),

drivers/gpu/drm/i915/display/skl_universal_plane.c

743

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

745

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

747

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

821

static void skl_write_plane_wm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

839

intel_de_write_dsb(display, dsb, PLANE_WM(pipe, plane_id, level),

drivers/gpu/drm/i915/display/skl_universal_plane.c

842

intel_de_write_dsb(display, dsb, PLANE_WM_TRANS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

848

intel_de_write_dsb(display, dsb, PLANE_WM_SAGV(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

850

intel_de_write_dsb(display, dsb, PLANE_WM_SAGV_TRANS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

854

intel_de_write_dsb(display, dsb, PLANE_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

858

intel_de_write_dsb(display, dsb, PLANE_NV12_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

862

intel_de_write_dsb(display, dsb, PLANE_MIN_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

867

skl_plane_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

875

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

877

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

878

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

881

static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

891

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

911

icl_plane_disable_arm(struct intel_dsb *dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

920

intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

922

skl_write_plane_wm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

924

icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);

drivers/gpu/drm/i915/display/skl_universal_plane.c

927

intel_de_write_dsb(display, dsb,

drivers/gpu/drm/i915/display/skl_universal_plane.c

930

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

931

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);

drivers/gpu/drm/i915/i915_driver.c

771

.dsb = &i915_display_dsb_interface,

drivers/gpu/drm/xe/display/xe_display.c

553

.dsb = &xe_display_dsb_interface,

drivers/hwtracing/coresight/coresight-etm4x-core.c

1887

dsb(sy);

drivers/hwtracing/coresight/coresight-etm4x-core.c

2116

dsb(sy);

drivers/hwtracing/coresight/coresight-etm4x-core.c

990

dsb(sy);

drivers/hwtracing/coresight/coresight-tpda.c

64

if (tpdm_data->dsb) {

drivers/hwtracing/coresight/coresight-tpdm.c

133

drvdata->dsb->trig_patt[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

139

drvdata->dsb->trig_patt_mask[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

145

drvdata->dsb->patt_val[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

151

drvdata->dsb->patt_mask[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

157

drvdata->dsb->msr[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

270

memset(drvdata->dsb, 0, sizeof(struct dsb_dataset));

drivers/hwtracing/coresight/coresight-tpdm.c

272

drvdata->dsb->trig_ts = true;

drivers/hwtracing/coresight/coresight-tpdm.c

273

drvdata->dsb->trig_type = false;

drivers/hwtracing/coresight/coresight-tpdm.c

285

mode = TPDM_DSB_MODE_TEST(drvdata->dsb->mode);

drivers/hwtracing/coresight/coresight-tpdm.c

290

mode = TPDM_DSB_MODE_HPBYTESEL(drvdata->dsb->mode);

drivers/hwtracing/coresight/coresight-tpdm.c

295

if (drvdata->dsb->mode & TPDM_DSB_MODE_PERF)

drivers/hwtracing/coresight/coresight-tpdm.c

312

if (drvdata->dsb->patt_ts) {

drivers/hwtracing/coresight/coresight-tpdm.c

314

if (drvdata->dsb->patt_type)

drivers/hwtracing/coresight/coresight-tpdm.c

323

if (drvdata->dsb->trig_ts)

drivers/hwtracing/coresight/coresight-tpdm.c

336

writel_relaxed(drvdata->dsb->msr[i],

drivers/hwtracing/coresight/coresight-tpdm.c

348

writel_relaxed(drvdata->dsb->edge_ctrl[i],

drivers/hwtracing/coresight/coresight-tpdm.c

351

writel_relaxed(drvdata->dsb->edge_ctrl_mask[i],

drivers/hwtracing/coresight/coresight-tpdm.c

354

writel_relaxed(drvdata->dsb->patt_val[i],

drivers/hwtracing/coresight/coresight-tpdm.c

356

writel_relaxed(drvdata->dsb->patt_mask[i],

drivers/hwtracing/coresight/coresight-tpdm.c

358

writel_relaxed(drvdata->dsb->trig_patt[i],

drivers/hwtracing/coresight/coresight-tpdm.c

360

writel_relaxed(drvdata->dsb->trig_patt_mask[i],

drivers/hwtracing/coresight/coresight-tpdm.c

371

if (drvdata->dsb->trig_type)

drivers/hwtracing/coresight/coresight-tpdm.c

53

drvdata->dsb->edge_ctrl[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

58

drvdata->dsb->edge_ctrl_mask[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

585

if (tpdm_has_dsb_dataset(drvdata) && (!drvdata->dsb)) {

drivers/hwtracing/coresight/coresight-tpdm.c

586

drvdata->dsb = devm_kzalloc(drvdata->dev,

drivers/hwtracing/coresight/coresight-tpdm.c

587

sizeof(*drvdata->dsb), GFP_KERNEL);

drivers/hwtracing/coresight/coresight-tpdm.c

588

if (!drvdata->dsb)

drivers/hwtracing/coresight/coresight-tpdm.c

608

(!drvdata->dsb)) {

drivers/hwtracing/coresight/coresight-tpdm.c

609

drvdata->dsb = devm_kzalloc(drvdata->dev,

drivers/hwtracing/coresight/coresight-tpdm.c

610

sizeof(*drvdata->dsb), GFP_KERNEL);

drivers/hwtracing/coresight/coresight-tpdm.c

612

if (!drvdata->dsb)

drivers/hwtracing/coresight/coresight-tpdm.c

63

drvdata->dsb->trig_patt[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

68

drvdata->dsb->trig_patt_mask[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

704

return sysfs_emit(buf, "%x\n", drvdata->dsb->mode);

drivers/hwtracing/coresight/coresight-tpdm.c

719

drvdata->dsb->mode = val & TPDM_DSB_MODE_MASK;

drivers/hwtracing/coresight/coresight-tpdm.c

73

drvdata->dsb->patt_val[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

732

(unsigned int)drvdata->dsb->edge_ctrl_idx);

drivers/hwtracing/coresight/coresight-tpdm.c

754

drvdata->dsb->edge_ctrl_idx = val;

drivers/hwtracing/coresight/coresight-tpdm.c

78

drvdata->dsb->patt_mask[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

786

reg = EDCR_TO_WORD_IDX(drvdata->dsb->edge_ctrl_idx);

drivers/hwtracing/coresight/coresight-tpdm.c

787

val = drvdata->dsb->edge_ctrl[reg];

drivers/hwtracing/coresight/coresight-tpdm.c

788

val &= ~EDCR_TO_WORD_MASK(drvdata->dsb->edge_ctrl_idx);

drivers/hwtracing/coresight/coresight-tpdm.c

789

val |= EDCR_TO_WORD_VAL(edge_ctrl, drvdata->dsb->edge_ctrl_idx);

drivers/hwtracing/coresight/coresight-tpdm.c

790

drvdata->dsb->edge_ctrl[reg] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

815

reg = EDCMR_TO_WORD_IDX(drvdata->dsb->edge_ctrl_idx);

drivers/hwtracing/coresight/coresight-tpdm.c

816

set = drvdata->dsb->edge_ctrl_mask[reg];

drivers/hwtracing/coresight/coresight-tpdm.c

818

set |= BIT(EDCMR_TO_WORD_SHIFT(drvdata->dsb->edge_ctrl_idx));

drivers/hwtracing/coresight/coresight-tpdm.c

820

set &= ~BIT(EDCMR_TO_WORD_SHIFT(drvdata->dsb->edge_ctrl_idx));

drivers/hwtracing/coresight/coresight-tpdm.c

821

drvdata->dsb->edge_ctrl_mask[reg] = set;

drivers/hwtracing/coresight/coresight-tpdm.c

83

drvdata->dsb->msr[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

839

(unsigned int)drvdata->dsb->patt_ts);

drivers/hwtracing/coresight/coresight-tpdm.c

865

drvdata->dsb->patt_ts = !!val;

drivers/hwtracing/coresight/coresight-tpdm.c

881

(unsigned int)drvdata->dsb->patt_type);

drivers/hwtracing/coresight/coresight-tpdm.c

898

drvdata->dsb->patt_type = val;

drivers/hwtracing/coresight/coresight-tpdm.c

910

(unsigned int)drvdata->dsb->trig_type);

drivers/hwtracing/coresight/coresight-tpdm.c

931

drvdata->dsb->trig_type = true;

drivers/hwtracing/coresight/coresight-tpdm.c

933

drvdata->dsb->trig_type = false;

drivers/hwtracing/coresight/coresight-tpdm.c

946

(unsigned int)drvdata->dsb->trig_ts);

drivers/hwtracing/coresight/coresight-tpdm.c

967

drvdata->dsb->trig_ts = true;

drivers/hwtracing/coresight/coresight-tpdm.c

969

drvdata->dsb->trig_ts = false;

drivers/hwtracing/coresight/coresight-tpdm.h

312

struct dsb_dataset *dsb;

drivers/hwtracing/coresight/coresight-trbe.c

215

dsb(nsh);

drivers/irqchip/irq-armada-370-xp.c

435

dsb();

drivers/irqchip/irq-gic-v3-its.c

1163

dsb(ishst);

drivers/irqchip/irq-gic-v3-its.c

1540

dsb(ishst);

drivers/irqchip/irq-gic-v3-its.c

2893

dsb(sy);

drivers/irqchip/irq-gic-v3-its.c

3277

dsb(sy);

drivers/irqchip/irq-gic-v3-its.c

3405

dsb(sy);

drivers/irqchip/irq-gic-v3-its.c

5392

dsb(sy);

drivers/irqchip/irq-gic-v3.c

1390

dsb(ishst);

drivers/irqchip/irq-gic-v3.c

681

dsb(sy);

drivers/irqchip/irq-gic-v5-irs.c

101

dsb(ishst);

drivers/irqchip/irq-gic-v5-irs.c

151

dsb(ishst);

drivers/irqchip/irq-gic-v5-irs.c

226

dsb(ishst);

drivers/irqchip/irq-gic-v5-its.c

72

dsb(ishst);

drivers/md/dm-zoned-metadata.c

1011

if (sb_block != (u64)dsb->zone->id << zmd->zone_nr_blocks_shift) {

drivers/md/dm-zoned-metadata.c

1013

sb_block, (u64)dsb->zone->id << zmd->zone_nr_blocks_shift);

drivers/md/dm-zoned-metadata.c

974

static int dmz_check_sb(struct dmz_metadata *zmd, struct dmz_sb *dsb,

drivers/md/dm-zoned-metadata.c

977

struct dmz_super *sb = dsb->sb;

drivers/md/dm-zoned-metadata.c

978

struct dmz_dev *dev = dsb->dev;

drivers/perf/arm_spe_pmu.c

671

dsb(nsh);

drivers/perf/arm_spe_pmu.c

691

dsb(nsh);

drivers/pinctrl/meson/pinctrl-meson.h

147

dsr, dsb) \

drivers/pinctrl/meson/pinctrl-meson.h

160

[MESON_REG_DS] = { dsr, dsb }, \

drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c

531

dsb(sy);

drivers/platform/raspberrypi/vchiq-interface/vchiq_core.c

559

dsb(sy); /* data barrier operation */

drivers/power/reset/arm-versatile-reboot.c

126

dsb();

drivers/scsi/aha1740.h

112

:1, dsb:1, /* Disable Status Block */

drivers/scsi/ncr53c8xx.c

1505

struct dsb phys;

drivers/scsi/ncr53c8xx.c

2027

SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),

drivers/scsi/ncr53c8xx.c

2108

offsetof (struct dsb, smsg),

drivers/scsi/ncr53c8xx.c

2151

offsetof (struct dsb, cmd),

drivers/scsi/ncr53c8xx.c

2788

SCR_SEL_TBL ^ offsetof (struct dsb, select),

drivers/scsi/ncr53c8xx.c

3207

offsetof (struct dsb, sense),

drivers/scsi/ncr53c8xx.c

3438

*p++ =offsetof (struct dsb, data[i]);

drivers/scsi/ncr53c8xx.c

3448

*p++ =offsetof (struct dsb, data[i]);

drivers/scsi/ncr53c8xx.c

3458

*p++ =offsetof (struct dsb, data[i]);

drivers/scsi/ncr53c8xx.c

3468

*p++ =offsetof (struct dsb, data[i]);

drivers/soc/tegra/cbb/tegra-cbb.c

155

dsb(sy);

drivers/soc/tegra/cbb/tegra194-cbb.c

1690

dsb(sy);

drivers/soc/tegra/cbb/tegra194-cbb.c

1702

dsb(sy);

drivers/soc/tegra/cbb/tegra194-cbb.c

2321

dsb(sy);

drivers/soc/tegra/cbb/tegra234-cbb.c

239

dsb(sy);

drivers/soc/tegra/cbb/tegra234-cbb.c

249

dsb(sy);

drivers/soc/tegra/cbb/tegra234-cbb.c

260

dsb(sy);

drivers/soc/tegra/cbb/tegra234-cbb.c

268

dsb(sy);

fs/erofs/compress.h

24

int (*config)(struct super_block *sb, struct erofs_super_block *dsb,

fs/erofs/decompressor.c

13

struct erofs_super_block *dsb, void *data, int size)

fs/erofs/decompressor.c

36

distance = le16_to_cpu(dsb->u1.lz4_max_distance);

fs/erofs/decompressor.c

447

int z_erofs_parse_cfgs(struct super_block *sb, struct erofs_super_block *dsb)

fs/erofs/decompressor.c

456

return z_erofs_load_lz4_config(sb, dsb, NULL, 0);

fs/erofs/decompressor.c

458

algs = le16_to_cpu(dsb->u1.available_compr_algs);

fs/erofs/decompressor.c

479

ret = dec->config(sb, dsb, data, size);

fs/erofs/decompressor_deflate.c

53

struct erofs_super_block *dsb, void *data, int size)

fs/erofs/decompressor_lzma.c

73

struct erofs_super_block *dsb, void *data, int size)

fs/erofs/decompressor_zstd.c

76

struct erofs_super_block *dsb, void *data, int size)

fs/erofs/internal.h

539

int z_erofs_parse_cfgs(struct super_block *sb, struct erofs_super_block *dsb);

fs/erofs/super.c

190

struct erofs_super_block *dsb)

fs/erofs/super.c

203

ondisk_extradevs = le16_to_cpu(dsb->extra_devices);

fs/erofs/super.c

223

pos = le16_to_cpu(dsb->devt_slotoff) * EROFS_DEVT_SLOT_SIZE;

fs/erofs/super.c

260

struct erofs_super_block *dsb;

fs/erofs/super.c

270

dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);

fs/erofs/super.c

272

if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {

fs/erofs/super.c

277

sbi->blkszbits = dsb->blkszbits;

fs/erofs/super.c

282

if (dsb->dirblkbits) {

fs/erofs/super.c

283

erofs_err(sb, "dirblkbits %u isn't supported", dsb->dirblkbits);

fs/erofs/super.c

287

sbi->feature_compat = le32_to_cpu(dsb->feature_compat);

fs/erofs/super.c

295

sbi->feature_incompat = le32_to_cpu(dsb->feature_incompat);

fs/erofs/super.c

302

sbi->sb_size = 128 + dsb->sb_extslots * EROFS_SB_EXTSLOT_SIZE;

fs/erofs/super.c

308

sbi->dif0.blocks = le32_to_cpu(dsb->blocks_lo);

fs/erofs/super.c

309

sbi->meta_blkaddr = le32_to_cpu(dsb->meta_blkaddr);

fs/erofs/super.c

311

sbi->xattr_blkaddr = le32_to_cpu(dsb->xattr_blkaddr);

fs/erofs/super.c

312

sbi->xattr_prefix_start = le32_to_cpu(dsb->xattr_prefix_start);

fs/erofs/super.c

313

sbi->xattr_prefix_count = dsb->xattr_prefix_count;

fs/erofs/super.c

314

sbi->xattr_filter_reserved = dsb->xattr_filter_reserved;

fs/erofs/super.c

316

if (dsb->ishare_xattr_prefix_id >= sbi->xattr_prefix_count) {

fs/erofs/super.c

318

dsb->ishare_xattr_prefix_id);

fs/erofs/super.c

322

sbi->ishare_xattr_prefix_id = dsb->ishare_xattr_prefix_id;

fs/erofs/super.c

326

if (erofs_sb_has_48bit(sbi) && dsb->rootnid_8b) {

fs/erofs/super.c

327

sbi->root_nid = le64_to_cpu(dsb->rootnid_8b);

fs/erofs/super.c

329

((u64)le16_to_cpu(dsb->rb.blocks_hi) << 32);

fs/erofs/super.c

331

sbi->root_nid = le16_to_cpu(dsb->rb.rootnid_2b);

fs/erofs/super.c

333

sbi->packed_nid = le64_to_cpu(dsb->packed_nid);

fs/erofs/super.c

339

sbi->metabox_nid = le64_to_cpu(dsb->metabox_nid);

fs/erofs/super.c

343

sbi->inos = le64_to_cpu(dsb->inos);

fs/erofs/super.c

345

sbi->epoch = (s64)le64_to_cpu(dsb->epoch);

fs/erofs/super.c

346

sbi->fixed_nsec = le32_to_cpu(dsb->fixed_nsec);

fs/erofs/super.c

347

super_set_uuid(sb, (void *)dsb->uuid, sizeof(dsb->uuid));

fs/erofs/super.c

349

if (dsb->volume_name[0]) {

fs/erofs/super.c

350

sbi->volume_name = kstrndup(dsb->volume_name,

fs/erofs/super.c

351

sizeof(dsb->volume_name), GFP_KERNEL);

fs/erofs/super.c

359

ret = z_erofs_parse_cfgs(sb, dsb);

fs/erofs/super.c

362

} else if (dsb->u1.available_compr_algs ||

fs/erofs/super.c

369

ret = erofs_scan_devices(sb, dsb);

fs/erofs/super.c

43

struct erofs_super_block *dsb = sbdata + EROFS_SUPER_OFFSET;

fs/erofs/super.c

49

sizeof(dsb->checksum);

fs/erofs/super.c

52

crc = crc32c(0x5045B54A, (&dsb->checksum) + 1, len);

fs/erofs/super.c

53

if (crc == le32_to_cpu(dsb->checksum))

fs/erofs/super.c

56

crc, le32_to_cpu(dsb->checksum));

fs/xfs/libxfs/xfs_ag.c

473

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/libxfs/xfs_ag.c

475

xfs_sb_to_disk(dsb, &mp->m_sb);

fs/xfs/libxfs/xfs_ag.c

476

dsb->sb_inprogress = 1;

fs/xfs/libxfs/xfs_rtgroup.c

699

const struct xfs_dsb *dsb = sb_bp->b_addr;

fs/xfs/libxfs/xfs_rtgroup.c

706

memcpy(&rsb->rsb_fname, &dsb->sb_fname, XFSLABEL_MAX);

fs/xfs/libxfs/xfs_rtgroup.c

708

memcpy(&rsb->rsb_uuid, &dsb->sb_uuid, sizeof(rsb->rsb_uuid));

fs/xfs/libxfs/xfs_rtgroup.c

714

if (dsb->sb_features_incompat &

fs/xfs/libxfs/xfs_rtgroup.c

716

meta_uuid = &dsb->sb_meta_uuid;

fs/xfs/libxfs/xfs_rtgroup.c

718

meta_uuid = &dsb->sb_uuid;

fs/xfs/libxfs/xfs_sb.c

1094

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/libxfs/xfs_sb.c

1101

if (dsb->sb_magicnum == cpu_to_be32(XFS_SB_MAGIC) &&

fs/xfs/libxfs/xfs_sb.c

1102

(((be16_to_cpu(dsb->sb_versionnum) & XFS_SB_VERSION_NUMBITS) ==

fs/xfs/libxfs/xfs_sb.c

1104

dsb->sb_crc != 0)) {

fs/xfs/libxfs/xfs_sb.c

1120

__xfs_sb_from_disk(&sb, dsb, false);

fs/xfs/libxfs/xfs_sb.c

1143

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/libxfs/xfs_sb.c

1145

if (dsb->sb_magicnum == cpu_to_be32(XFS_SB_MAGIC)) {

fs/xfs/libxfs/xfs_sb.c

1161

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/libxfs/xfs_sb.c

1168

__xfs_sb_from_disk(&sb, dsb, false);

fs/xfs/libxfs/xfs_sb.c

1180

dsb->sb_lsn = cpu_to_be64(bip->bli_item.li_lsn);

fs/xfs/libxfs/xfs_sb.c

497

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/libxfs/xfs_sb.c

503

if (!xfs_verify_magic(bp, dsb->sb_magicnum)) {

fs/xfs/libxfs/xfs_sb.c

506

be32_to_cpu(dsb->sb_magicnum));

fs/xfs/xfs_buf_item_recover.c

722

struct xfs_dsb *dsb = bp->b_addr;

fs/xfs/xfs_buf_item_recover.c

737

xfs_sb_from_disk(&mp->m_sb, dsb);

fs/xfs/xfs_mount.c

1557

struct xfs_dsb *dsb;

fs/xfs/xfs_mount.c

1594

dsb = mp->m_sb_bp->b_addr;

fs/xfs/xfs_mount.c

1595

xfs_sb_to_disk(dsb, &mp->m_sb);

fs/xfs/xfs_mount.c

1596

dsb->sb_features_log_incompat |= cpu_to_be32(feature);

include/drm/intel/display_parent_interface.h

203

const struct intel_display_dsb_interface *dsb;

include/linux/raspberrypi/vchiq_core.h

26

#ifndef dsb

include/linux/raspberrypi/vchiq_core.h

69

do { debug_ptr[DEBUG_ ## d] = __LINE__; dsb(sy); } while (0)

include/linux/raspberrypi/vchiq_core.h

71

do { debug_ptr[DEBUG_ ## d] = (v); dsb(sy); } while (0)

include/linux/raspberrypi/vchiq_core.h

73

do { debug_ptr[DEBUG_ ## d]++; dsb(sy); } while (0)

tools/testing/selftests/kvm/arm64/idreg-idst.c

20

dsb(sy); \

tools/testing/selftests/kvm/arm64/no-vgic.c

21

dsb(sy); \

tools/testing/selftests/kvm/arm64/no-vgic.c

29

dsb(sy); \

tools/testing/selftests/kvm/arm64/no-vgic.c

39

dsb(sy); \

tools/testing/selftests/kvm/arm64/no-vgic.c

47

dsb(sy); \

tools/testing/selftests/kvm/arm64/page_fault_test.c

154

dsb(ish);

tools/testing/selftests/kvm/arm64/page_fault_test.c

219

dsb(ish);

tools/testing/selftests/kvm/arm64/page_fault_test.c

77

dsb(ishst);

tools/testing/selftests/kvm/arm64/page_fault_test.c

79

dsb(ish);

tools/testing/selftests/kvm/arm64/vgic_irq.c

152

dsb(sy);

tools/testing/selftests/kvm/arm64/vgic_irq.c

828

dsb(ishst);

tools/testing/selftests/kvm/arm64/vgic_irq.c

831

dsb(ishld);

tools/testing/selftests/kvm/arm64/vgic_irq.c

836

dsb(ishld);

tools/testing/selftests/kvm/arm64/vgic_irq.c

843

dsb(ishst);

tools/testing/selftests/kvm/arm64/vpmu_counter_access.c

320

dsb(ish); \

tools/testing/selftests/kvm/lib/arm64/gic.c

46

dsb(sy);

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

98

dsb(sy);

tools/testing/selftests/kvm/lib/arm64/gic_v3_its.c

189

dsb(ishst);