dw_hdmi_qp_write
dw_hdmi_qp_write(hdmi, stat, CEC_INT_CLEAR);
dw_hdmi_qp_write(hdmi, 1, CEC_LOCK_CONTROL);
dw_hdmi_qp_write(hdmi, 0, CEC_TX_COUNT);
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
dw_hdmi_qp_write(hdmi, 0, CEC_INT_MASK_N);
dw_hdmi_qp_write(hdmi, cec->addresses, CEC_ADDR);
dw_hdmi_qp_write(hdmi, 0, CEC_INT_MASK_N);
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
dw_hdmi_qp_write(hdmi, swdisable, GLOBAL_SWDISABLE);
dw_hdmi_qp_write(hdmi, swdisable, GLOBAL_SWDISABLE);
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
dw_hdmi_qp_write(hdmi, 1, CEC_LOCK_CONTROL);
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
dw_hdmi_qp_write(hdmi, irqs, CEC_INT_MASK_N);
dw_hdmi_qp_write(hdmi, val, CEC_TX_DATA3_0 + (i / 4) * 4);
dw_hdmi_qp_write(hdmi, msg->len - 1, CEC_TX_COUNT);
dw_hdmi_qp_write(hdmi, CEC_CTRL_START, CEC_TX_CONTROL);
dw_hdmi_qp_write(hdmi, i2c->stat, MAINUNIT_1_INT_CLEAR);
dw_hdmi_qp_write(hdmi, 0, MAINUNIT_0_INT_MASK_N);
dw_hdmi_qp_write(hdmi, 0, MAINUNIT_1_INT_MASK_N);
dw_hdmi_qp_write(hdmi, hdmi->ref_clk_rate, TIMER_BASE_CONFIG0);
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
dw_hdmi_qp_write(hdmi, 0x085c085c, I2CM_FM_SCL_CONFIG0);
dw_hdmi_qp_write(hdmi, I2CM_OP_DONE_CLEAR | I2CM_NACK_RCVD_CLEAR,
dw_hdmi_qp_write(hdmi, AVP_DATAPATH_PACKET_AUDIO_SWINIT_P, GLOBAL_SWRESET_REQUEST);
dw_hdmi_qp_write(hdmi, AUDIO_FIFO_CLR_P, AUDIO_INTERFACE_CONTROL0);
dw_hdmi_qp_write(hdmi, channel_status[0] | (channel_status[1] << 8),
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
dw_hdmi_qp_write(hdmi, *buf++, I2CM_INTERFACE_WRDATA_0_3);
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
dw_hdmi_qp_write(hdmi, val, PKT_AVI_CONTENTS0);
dw_hdmi_qp_write(hdmi, val, PKT_AVI_CONTENTS1 + i * 4);
dw_hdmi_qp_write(hdmi, val, PKT_DRMI_CONTENTS0);
dw_hdmi_qp_write(hdmi, val,