drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

183

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

266

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

137

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

174

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

219

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

274

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

323

struct dpu_hw_wb *hw_wb = phys_enc->hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

358

struct dpu_hw_wb *hw_wb = phys_enc->hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

38

static bool _dpu_encoder_phys_wb_clk_force_ctrl(struct dpu_hw_wb *wb,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

531

struct dpu_hw_wb *hw_wb = phys_enc->hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

62

struct dpu_hw_wb *hw_wb = phys_enc->hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

94

struct dpu_hw_wb *hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

126

static void dpu_hw_wb_roi(struct dpu_hw_wb *ctx, struct dpu_hw_wb_cfg *wb)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

140

static void dpu_hw_wb_setup_qos_lut(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

151

static void dpu_hw_wb_setup_qos_lut_v13(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

160

static void dpu_hw_wb_setup_cdp(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

171

struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

195

static bool dpu_hw_wb_setup_clk_force_ctrl(struct dpu_hw_wb *ctx, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

239

struct dpu_hw_wb *dpu_hw_wb_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

244

struct dpu_hw_wb *c;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

55

static void dpu_hw_wb_setup_outaddress(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

66

static void dpu_hw_wb_setup_format(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

15

struct dpu_hw_wb;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

36

void (*setup_outaddress)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

39

void (*setup_outformat)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

43

void (*setup_roi)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

46

void (*setup_qos_lut)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

49

void (*setup_cdp)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

53

bool (*setup_clk_force_ctrl)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

56

void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h

78

struct dpu_hw_wb *dpu_hw_wb_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

116

struct dpu_hw_wb *hw;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

113

static inline struct dpu_hw_wb *dpu_rm_get_wb(struct dpu_rm *rm, enum dpu_wb wb_idx)

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

34

struct dpu_hw_wb *hw_wb[WB_MAX - WB_0];