drivers/gpu/drm/i915/display/intel_dpll_mgr.c

104

const struct dpll_info *dpll_info;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1329

static const struct dpll_info hsw_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1343

.dpll_info = hsw_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2038

static const struct dpll_info skl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2048

.dpll_info = skl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2520

static const struct dpll_info bxt_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2528

.dpll_info = bxt_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4207

static const struct dpll_info icl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4220

.dpll_info = icl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4230

static const struct dpll_info ehl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4239

.dpll_info = ehl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4255

static const struct dpll_info tgl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4270

.dpll_info = tgl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4280

static const struct dpll_info rkl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4288

.dpll_info = rkl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4297

static const struct dpll_info dg1_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4306

.dpll_info = dg1_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4315

static const struct dpll_info adls_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4324

.dpll_info = adls_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4333

static const struct dpll_info adlp_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4346

.dpll_info = adlp_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4457

static const struct dpll_info mtl_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4564

.dpll_info = mtl_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4635

static const struct dpll_info xe3plpd_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4728

.dpll_info = xe3plpd_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4747

const struct dpll_info *dpll_info;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4785

dpll_info = dpll_mgr->dpll_info;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4787

for (i = 0; dpll_info[i].name; i++) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4793

if (drm_WARN_ON(display->drm, dpll_info[i].id >= 32))

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4796

display->dpll.dplls[i].info = &dpll_info[i];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

696

static const struct dpll_info pch_plls[] = {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

703

.dpll_info = pch_plls,

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

391

const struct dpll_info *info;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

218

struct dpll_info dpll = { 0 };

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

84

struct dpll_info *dpll,