drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1521

static void vop2_dither_setup(struct drm_crtc *crtc, u32 *dsp_ctrl)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1527

*dsp_ctrl |= RK3568_VP_DSP_CTRL__DITHER_DOWN_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1532

*dsp_ctrl |= RK3568_VP_DSP_CTRL__DITHER_DOWN_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1533

*dsp_ctrl |= RGB888_TO_RGB666;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1537

*dsp_ctrl |= RK3568_VP_DSP_CTRL__PRE_DITHER_DOWN_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1544

*dsp_ctrl |= RK3568_VP_DSP_CTRL__PRE_DITHER_DOWN_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1546

*dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__DITHER_DOWN_SEL,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1630

u32 dsp_ctrl = 0;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1689

dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__OUT_MODE, out_mode);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1692

dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_RB_SWAP;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1694

dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_RG_SWAP;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1697

dsp_ctrl |= RK3568_VP_DSP_CTRL__POST_DSP_OUT_R2Y;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1699

vop2_dither_setup(crtc, &dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1719

dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_INTERLACE;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1720

dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_FILED_POL;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1721

dsp_ctrl |= RK3568_VP_DSP_CTRL__P2I_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1734

dsp_ctrl |= RK3568_VP_DSP_CTRL__CORE_DCLK_DIV;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1790

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

866

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

868

return dsp_ctrl & RK3568_VP_DSP_CTRL__DSP_LUT_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

873

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

875

dsp_ctrl &= ~RK3568_VP_DSP_CTRL__DSP_LUT_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

876

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

881

u32 dsp_ctrl;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

882

int ret = readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

883

!dsp_ctrl, 5, 30 * 1000);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

894

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

896

dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_LUT_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

897

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

902

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

904

dsp_ctrl |= RK3588_VP_DSP_CTRL__GAMMA_UPDATE_EN;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

905

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/isdn/mISDN/dsp_core.c

1068

ndsp->ch.ctrl = dsp_ctrl;