drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

386

dsi_phy_tst_set(base, CLK_TLPX, phy->clk_t_lpx);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

387

dsi_phy_tst_set(base, CLK_THS_PREPARE, phy->clk_t_hs_prepare);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

388

dsi_phy_tst_set(base, CLK_THS_ZERO, phy->clk_t_hs_zero);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

389

dsi_phy_tst_set(base, CLK_THS_TRAIL, phy->clk_t_hs_trial);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

390

dsi_phy_tst_set(base, CLK_TWAKEUP, phy->clk_t_wakeup);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

397

dsi_phy_tst_set(base, DATA_TLPX(i), phy->data_t_lpx);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

398

dsi_phy_tst_set(base, DATA_THS_PREPARE(i),

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

400

dsi_phy_tst_set(base, DATA_THS_ZERO(i), phy->data_t_hs_zero);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

401

dsi_phy_tst_set(base, DATA_THS_TRAIL(i), phy->data_t_hs_trial);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

402

dsi_phy_tst_set(base, DATA_TTA_GO(i), phy->data_t_ta_go);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

403

dsi_phy_tst_set(base, DATA_TTA_GET(i), phy->data_t_ta_get);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

404

dsi_phy_tst_set(base, DATA_TWAKEUP(i), phy->data_t_wakeup);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

411

dsi_phy_tst_set(base, PHY_CFG_I, phy->hstx_ckg_sel);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

414

dsi_phy_tst_set(base, PHY_CFG_PLL_I, val);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

415

dsi_phy_tst_set(base, PHY_CFG_PLL_II, phy->pll_fbd_p);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

416

dsi_phy_tst_set(base, PHY_CFG_PLL_III, phy->pll_fbd_s);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

418

dsi_phy_tst_set(base, PHY_CFG_PLL_IV, val);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

421

dsi_phy_tst_set(base, PHY_CFG_PLL_V, val);