CFG_CLK_DIV
spisg->cfg_bus &= ~CFG_CLK_DIV;
spisg->cfg_bus |= cfg_bus & CFG_CLK_DIV;
div->shift = __bf_shf(CFG_CLK_DIV);
regmap_update_bits(spisg->map, SPISG_REG_CFG_BUS, CFG_CLK_DIV,
FIELD_PREP(CFG_CLK_DIV, SPISG_CLK_DIV_MIN - 1));