Symbol: dml_round_to_multiple
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
227
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0),
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
256
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
259
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2 / 3,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
462
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
466
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_height - 1, blk256_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
498
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
503
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
529
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
532
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
620
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
629
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
636
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
227
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0),
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
256
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
259
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2 / 3,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
462
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
466
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_height - 1, blk256_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
498
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
503
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
529
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
532
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
620
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
629
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
636
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
207
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
238
full_swath_bytes_packed_l = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
242
full_swath_bytes_packed_c = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
454
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
458
rq_dlg_param->swath_width_ub = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
492
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
497
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
523
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
526
meta_pte_req_per_frame_ub = (dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
621
dpte_row_width_ub = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
631
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
638
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
151
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0),
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
180
full_swath_bytes_packed_l = (unsigned int)dml_round_to_multiple((unsigned int)(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0),
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
183
full_swath_bytes_packed_c = (unsigned int)dml_round_to_multiple((unsigned int)(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0),
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
413
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
429
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
471
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
476
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
502
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
505
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
591
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
600
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
607
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
149
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
192
full_swath_bytes_packed_l = (unsigned int)(dml_round_to_multiple((unsigned int)(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0), 256, 1) + 256);
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
193
full_swath_bytes_packed_c = (unsigned int)(dml_round_to_multiple((unsigned int)(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0), 256, 1) + 256);
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
433
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
449
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
488
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
492
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) + meta_req_height;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
511
meta_surface_bytes = meta_pitch * (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height) * bytes_per_element / 256;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
513
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes, 8 * vmpg_bytes, 1) + 8 * vmpg_bytes) / (8 * vmpg_bytes);
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
592
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + dpte_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
599
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1) + dpte_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
603
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1) + dpte_req_height;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
237
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
280
full_swath_bytes_packed_l = (unsigned int)(dml_round_to_multiple((unsigned int)(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0), 256, 1) + 256);
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
281
full_swath_bytes_packed_c = (unsigned int)(dml_round_to_multiple((unsigned int)(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0), 256, 1) + 256);
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
521
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
537
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
576
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
580
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) + meta_req_height;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
599
meta_surface_bytes = meta_pitch * (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height) * bytes_per_element / 256;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
601
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes, 8 * vmpg_bytes, 1) + 8 * vmpg_bytes) / (8 * vmpg_bytes);
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
680
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + dpte_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
687
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1) + dpte_req_width;
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
691
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1) + dpte_req_height;
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
181
dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
266
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
297
full_swath_bytes_packed_l = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
301
full_swath_bytes_packed_c = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
696
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
700
rq_dlg_param->swath_width_ub = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
738
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
743
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
767
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1)
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
770
meta_pte_req_per_frame_ub = (dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
866
dpte_row_width_ub = dml_round_to_multiple(
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
875
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
882
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_util.h
50
__DML_DLL_EXPORT__ dml_uint_t dml_round_to_multiple(dml_uint_t num, dml_uint_t multiple, dml_bool_t up);
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12460
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma
drivers/gpu/drm/amd/display/dc/dml2_0/dml_display_rq_dlg_calc.c
172
detile_buf_plane1_addr = (dml_uint_t)(dml_round_to_multiple((dml_uint_t)((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma