drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

962

struct dml2_per_plane_programming *pln_prog,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.h

25

void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog, struct dml2_pipe_configuration_descriptor *mcache_pipe_config);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

165

struct dml2_per_plane_programming *pln_prog,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

213

void dml21_program_dc_pipe(struct dml2_context *dml_ctx, struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

284

struct dml2_per_plane_programming *plane_programming)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

28

struct dml2_per_plane_programming *pln_prog,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

43

struct dml2_per_plane_programming *pln_prog,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

145

struct dml2_per_plane_programming *pln_prog = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

280

struct dml2_per_plane_programming *pln_prog = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

57

struct dml2_per_plane_programming *pln_prog = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h

440

struct dml2_per_plane_programming plane_programming[DML2_MAX_PLANES];