drivers/gpu/drm/i915/display/i9xx_wm.c

103

DIV_ROUND_CLOSEST(dram_info->fsb_freq, 1000) == latency->fsb_freq &&

drivers/gpu/drm/i915/display/i9xx_wm.c

104

DIV_ROUND_CLOSEST(dram_info->mem_freq, 1000) == latency->mem_freq)

drivers/gpu/drm/i915/display/i9xx_wm.c

110

intel_dram_type_str(dram_info->type),

drivers/gpu/drm/i915/display/i9xx_wm.c

111

dram_info->fsb_freq, dram_info->mem_freq);

drivers/gpu/drm/i915/display/i9xx_wm.c

93

const struct dram_info *dram_info = intel_dram_info(display);

drivers/gpu/drm/i915/display/i9xx_wm.c

94

bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;

drivers/gpu/drm/i915/display/intel_bw.c

247

const struct dram_info *dram_info,

drivers/gpu/drm/i915/display/intel_bw.c

253

qi->num_points = dram_info->num_qgv_points;

drivers/gpu/drm/i915/display/intel_bw.c

254

qi->num_psf_points = dram_info->num_psf_gv_points;

drivers/gpu/drm/i915/display/intel_bw.c

257

switch (dram_info->type) {

drivers/gpu/drm/i915/display/intel_bw.c

282

MISSING_CASE(dram_info->type);

drivers/gpu/drm/i915/display/intel_bw.c

286

switch (dram_info->type) {

drivers/gpu/drm/i915/display/intel_bw.c

320

qi->t_bl = dram_info->type == INTEL_DRAM_DDR4 ? 4 : 8;

drivers/gpu/drm/i915/display/intel_bw.c

454

const struct dram_info *dram_info,

drivers/gpu/drm/i915/display/intel_bw.c

459

int num_channels = max_t(u8, 1, dram_info->num_channels);

drivers/gpu/drm/i915/display/intel_bw.c

466

ret = icl_get_qgv_points(display, dram_info, &qi, is_y_tile);

drivers/gpu/drm/i915/display/intel_bw.c

525

const struct dram_info *dram_info,

drivers/gpu/drm/i915/display/intel_bw.c

530

int num_channels = max_t(u8, 1, dram_info->num_channels);

drivers/gpu/drm/i915/display/intel_bw.c

538

ret = icl_get_qgv_points(display, dram_info, &qi, is_y_tile);

drivers/gpu/drm/i915/display/intel_bw.c

546

(dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5))

drivers/gpu/drm/i915/display/intel_bw.c

668

const struct dram_info *dram_info,

drivers/gpu/drm/i915/display/intel_bw.c

672

int num_channels = dram_info->num_channels;

drivers/gpu/drm/i915/display/intel_bw.c

676

ret = icl_get_qgv_points(display, dram_info, &qi, true);

drivers/gpu/drm/i915/display/intel_bw.c

799

const struct dram_info *dram_info = intel_dram_info(display);

drivers/gpu/drm/i915/display/intel_bw.c

811

drm_WARN_ON(display->drm, dram_info->ecc_impacting_de_bw);

drivers/gpu/drm/i915/display/intel_bw.c

815

tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

817

tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

819

if (dram_info->type == INTEL_DRAM_GDDR_ECC)

drivers/gpu/drm/i915/display/intel_bw.c

820

xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_ecc_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

822

xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

824

tgl_get_bw_info(display, dram_info, &mtl_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

828

tgl_get_bw_info(display, dram_info, &adlp_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

830

tgl_get_bw_info(display, dram_info, &adls_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

832

tgl_get_bw_info(display, dram_info, &rkl_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

834

tgl_get_bw_info(display, dram_info, &tgl_sa_info);

drivers/gpu/drm/i915/display/intel_bw.c

836

icl_get_bw_info(display, dram_info, &icl_sa_info);

drivers/gpu/drm/i915/display/intel_display_core.h

398

const struct dram_info *info;

drivers/gpu/drm/i915/display/intel_display_power.c

1616

const struct dram_info *dram_info = intel_dram_info(display);

drivers/gpu/drm/i915/display/intel_display_power.c

1633

if (table[config].num_channels == dram_info->num_channels &&

drivers/gpu/drm/i915/display/intel_display_power.c

1634

table[config].type == dram_info->type)

drivers/gpu/drm/i915/display/intel_dram.c

252

static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

254

dram_info->fsb_freq = intel_fsb_freq(display);

drivers/gpu/drm/i915/display/intel_dram.c

255

if (dram_info->fsb_freq)

drivers/gpu/drm/i915/display/intel_dram.c

256

drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);

drivers/gpu/drm/i915/display/intel_dram.c

258

dram_info->mem_freq = intel_mem_freq(display);

drivers/gpu/drm/i915/display/intel_dram.c

259

if (dram_info->mem_freq)

drivers/gpu/drm/i915/display/intel_dram.c

260

drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);

drivers/gpu/drm/i915/display/intel_dram.c

263

dram_info->type = pnv_dram_type(display);

drivers/gpu/drm/i915/display/intel_dram.c

484

skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

492

dram_info->has_16gb_dimms = true;

drivers/gpu/drm/i915/display/intel_dram.c

497

dram_info->num_channels++;

drivers/gpu/drm/i915/display/intel_dram.c

502

dram_info->num_channels++;

drivers/gpu/drm/i915/display/intel_dram.c

504

if (dram_info->num_channels == 0) {

drivers/gpu/drm/i915/display/intel_dram.c

514

dram_info->has_16gb_dimms = ch0.is_16gb_dimm || ch1.is_16gb_dimm;

drivers/gpu/drm/i915/display/intel_dram.c

516

dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);

drivers/gpu/drm/i915/display/intel_dram.c

519

str_yes_no(dram_info->symmetric_memory));

drivers/gpu/drm/i915/display/intel_dram.c

522

str_yes_no(dram_info->has_16gb_dimms));

drivers/gpu/drm/i915/display/intel_dram.c

551

skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

555

dram_info->type = skl_get_dram_type(display);

drivers/gpu/drm/i915/display/intel_dram.c

557

ret = skl_dram_get_channels_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

642

static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

660

dram_info->num_channels++;

drivers/gpu/drm/i915/display/intel_dram.c

666

dram_info->type != INTEL_DRAM_UNKNOWN &&

drivers/gpu/drm/i915/display/intel_dram.c

667

dram_info->type != type);

drivers/gpu/drm/i915/display/intel_dram.c

678

dram_info->type = type;

drivers/gpu/drm/i915/display/intel_dram.c

681

if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {

drivers/gpu/drm/i915/display/intel_dram.c

690

struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

703

dram_info->type = INTEL_DRAM_DDR4;

drivers/gpu/drm/i915/display/intel_dram.c

706

dram_info->type = INTEL_DRAM_DDR5;

drivers/gpu/drm/i915/display/intel_dram.c

709

dram_info->type = INTEL_DRAM_LPDDR5;

drivers/gpu/drm/i915/display/intel_dram.c

712

dram_info->type = INTEL_DRAM_LPDDR4;

drivers/gpu/drm/i915/display/intel_dram.c

715

dram_info->type = INTEL_DRAM_DDR3;

drivers/gpu/drm/i915/display/intel_dram.c

718

dram_info->type = INTEL_DRAM_LPDDR3;

drivers/gpu/drm/i915/display/intel_dram.c

727

dram_info->type = INTEL_DRAM_DDR4;

drivers/gpu/drm/i915/display/intel_dram.c

730

dram_info->type = INTEL_DRAM_DDR3;

drivers/gpu/drm/i915/display/intel_dram.c

733

dram_info->type = INTEL_DRAM_LPDDR3;

drivers/gpu/drm/i915/display/intel_dram.c

736

dram_info->type = INTEL_DRAM_LPDDR4;

drivers/gpu/drm/i915/display/intel_dram.c

744

dram_info->num_channels = (val & 0xf0) >> 4;

drivers/gpu/drm/i915/display/intel_dram.c

745

dram_info->num_qgv_points = (val & 0xf00) >> 8;

drivers/gpu/drm/i915/display/intel_dram.c

746

dram_info->num_psf_gv_points = (val & 0x3000) >> 12;

drivers/gpu/drm/i915/display/intel_dram.c

751

static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

755

ret = skl_dram_get_channels_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

759

return icl_pcode_read_mem_global_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

762

static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

764

return icl_pcode_read_mem_global_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

767

static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

774

dram_info->type = INTEL_DRAM_DDR4;

drivers/gpu/drm/i915/display/intel_dram.c

777

dram_info->type = INTEL_DRAM_DDR5;

drivers/gpu/drm/i915/display/intel_dram.c

780

dram_info->type = INTEL_DRAM_LPDDR5;

drivers/gpu/drm/i915/display/intel_dram.c

783

dram_info->type = INTEL_DRAM_LPDDR4;

drivers/gpu/drm/i915/display/intel_dram.c

786

dram_info->type = INTEL_DRAM_DDR3;

drivers/gpu/drm/i915/display/intel_dram.c

789

dram_info->type = INTEL_DRAM_LPDDR3;

drivers/gpu/drm/i915/display/intel_dram.c

793

dram_info->type = INTEL_DRAM_GDDR;

drivers/gpu/drm/i915/display/intel_dram.c

797

dram_info->type = INTEL_DRAM_GDDR_ECC;

drivers/gpu/drm/i915/display/intel_dram.c

804

dram_info->num_channels = REG_FIELD_GET(MTL_N_OF_POPULATED_CH_MASK, val);

drivers/gpu/drm/i915/display/intel_dram.c

805

dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);

drivers/gpu/drm/i915/display/intel_dram.c

809

dram_info->ecc_impacting_de_bw = REG_FIELD_GET(XE3P_ECC_IMPACTING_DE, val);

drivers/gpu/drm/i915/display/intel_dram.c

816

struct dram_info *dram_info;

drivers/gpu/drm/i915/display/intel_dram.c

822

dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);

drivers/gpu/drm/i915/display/intel_dram.c

823

if (!dram_info)

drivers/gpu/drm/i915/display/intel_dram.c

826

display->dram.info = dram_info;

drivers/gpu/drm/i915/display/intel_dram.c

829

ret = xelpdp_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

831

ret = gen12_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

833

ret = gen11_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

835

ret = bxt_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

837

ret = skl_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

839

ret = i915_get_dram_info(display, dram_info);

drivers/gpu/drm/i915/display/intel_dram.c

842

intel_dram_type_str(dram_info->type));

drivers/gpu/drm/i915/display/intel_dram.c

844

drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);

drivers/gpu/drm/i915/display/intel_dram.c

846

drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);

drivers/gpu/drm/i915/display/intel_dram.c

847

drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);

drivers/gpu/drm/i915/display/intel_dram.c

861

const struct dram_info *intel_dram_info(struct intel_display *display)

drivers/gpu/drm/i915/display/intel_dram.h

40

const struct dram_info *intel_dram_info(struct intel_display *display);

drivers/gpu/drm/i915/display/skl_watermark.c

3128

const struct dram_info *dram_info = intel_dram_info(display);

drivers/gpu/drm/i915/display/skl_watermark.c

3130

return dram_info->symmetric_memory;

drivers/gpu/drm/i915/display/skl_watermark.c

3172

const struct dram_info *dram_info = intel_dram_info(display);

drivers/gpu/drm/i915/display/skl_watermark.c

3176

DISPLAY_VER(display) == 11) && dram_info->has_16gb_dimms;

drivers/gpu/drm/xe/xe_device_types.h

39

struct dram_info;

drivers/net/wireless/intel/iwlwifi/fw/api/tx.h

280

struct iwl_dram_sec_info dram_info;

drivers/net/wireless/intel/iwlwifi/fw/api/tx.h

302

struct iwl_dram_sec_info dram_info;

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

743

struct iwl_dram_info *dram_info)

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

770

data = &dram_info->dram_frags[alloc_id - 1];

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

798

struct iwl_dram_info *dram_info;

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

803

dram_info = frags->block;

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

809

memset(dram_info, 0, sizeof(*dram_info));

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

817

ret = iwl_dbg_tlv_update_dram(fwrt, i, dram_info);

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

827

dram_info->first_word = cpu_to_le32(DRAM_INFO_FIRST_MAGIC_WORD);

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

828

dram_info->second_word = cpu_to_le32(DRAM_INFO_SECOND_MAGIC_WORD);

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

900

struct iwl_dbgc1_info dram_info = {};

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

920

dram_info.dbgc1_add_lsb =

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

922

dram_info.dbgc1_add_msb =

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

924

dram_info.dbgc1_size = cpu_to_le32(le32_to_cpu(dram_size) - 0x400);

drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c

926

address + offset, &dram_info, 4);

drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c

495

offsetofend(struct iwl_tx_cmd_v9, dram_info) >

drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c

499

offsetofend(struct iwl_tx_cmd, dram_info) >