dqrr
const struct qm_dqrr_entry *dqrr,
fd = &dqrr->fd;
fq->cb.dqrr = caam_rsp_fq_dqrr_cb;
.rx_defq = { .cb = { .dqrr = rx_default_dqrr } },
.tx_defq = { .cb = { .dqrr = conf_dflt_dqrr } },
.rx_errq = { .cb = { .dqrr = rx_error_dqrr } },
.tx_errq = { .cb = { .dqrr = conf_error_dqrr } },
return qbman_swp_set_irq_coalescing(swp, swp->dqrr.dqrr_size - 1,
if (unlikely(s->dqrr.reset_bug)) {
if (pi == s->dqrr.next_idx)
if (s->dqrr.next_idx == (s->dqrr.dqrr_size - 1)) {
s->dqrr.next_idx, pi);
s->dqrr.reset_bug = 0;
QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
s->dqrr.next_idx++;
s->dqrr.next_idx &= s->dqrr.dqrr_size - 1; /* Wrap around */
if (!s->dqrr.next_idx)
s->dqrr.valid_bit ^= QB_VALID_BIT;
prefetch(qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
if (unlikely(s->dqrr.reset_bug)) {
if (pi == s->dqrr.next_idx)
if (s->dqrr.next_idx == (s->dqrr.dqrr_size - 1)) {
s->dqrr.next_idx, pi);
s->dqrr.reset_bug = 0;
QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR_MEM(s->dqrr.next_idx));
if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
s->dqrr.next_idx++;
s->dqrr.next_idx &= s->dqrr.dqrr_size - 1; /* Wrap around */
if (!s->dqrr.next_idx)
s->dqrr.valid_bit ^= QB_VALID_BIT;
prefetch(qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
if (irq_threshold >= p->dqrr.dqrr_size) {
pr_err("irq_threshold must be < %u\n", p->dqrr.dqrr_size - 1);
p->dqrr.next_idx = 0;
p->dqrr.valid_bit = QB_VALID_BIT;
p->dqrr.dqrr_size = 4;
p->dqrr.reset_bug = 1;
p->dqrr.dqrr_size = 8;
p->dqrr.reset_bug = 0;
reg = qbman_set_swp_cfg(p->dqrr.dqrr_size,
reg = qbman_set_swp_cfg(p->dqrr.dqrr_size,
qbman_swp_set_irq_coalescing(p, p->dqrr.dqrr_size - 1, 0);
} dqrr;
portal->p.dqrr.ithresh = ithresh;
res = fq->cb.dqrr(p, fq, dq, sched_napi);
res = fq->cb.dqrr(p, fq, dq, sched_napi);
const struct qm_dqrr_entry *dqrr;
dqrr = qm_dqrr_current(p);
if (!dqrr)
} while (wait && !dqrr);
while (dqrr) {
if (qm_fqid_get(dqrr) == fqid && (dqrr->stat & s))
qm_dqrr_cdc_consume_1ptr(p, dqrr, 0);
dqrr = qm_dqrr_current(p);
struct qm_dqrr dqrr;
struct qm_dqrr *dqrr = &portal->dqrr;
dqrr->ring = portal->addr.ce + QM_CL_DQRR;
dqrr->pi = qm_in(portal, QM_REG_DQRR_PI_CINH) & (QM_DQRR_SIZE - 1);
dqrr->ci = qm_in(portal, QM_REG_DQRR_CI_CINH) & (QM_DQRR_SIZE - 1);
dqrr->cursor = dqrr->ring + dqrr->ci;
dqrr->fill = dpaa_cyc_diff(QM_DQRR_SIZE, dqrr->ci, dqrr->pi);
dqrr->vbit = (qm_in(portal, QM_REG_DQRR_PI_CINH) & QM_DQRR_SIZE) ?
dqrr->ithresh = qm_in(portal, QM_REG_DQRR_ITR);
dqrr->dmode = dmode;
dqrr->pmode = pmode;
dqrr->cmode = cmode;
dpaa_invalidate(qm_cl(dqrr->ring, cfg));
struct qm_dqrr *dqrr = &portal->dqrr;
if (dqrr->cmode != qm_dqrr_cdc &&
dqrr->ci != dqrr_ptr2idx(dqrr->cursor))
struct qm_dqrr *dqrr = &portal->dqrr;
if (!dqrr->fill)
return dqrr->cursor;
struct qm_dqrr *dqrr = &portal->dqrr;
DPAA_ASSERT(dqrr->fill);
dqrr->cursor = dqrr_inc(dqrr->cursor);
return --dqrr->fill;
struct qm_dqrr *dqrr = &portal->dqrr;
struct qm_dqrr_entry *res = qm_cl(dqrr->ring, dqrr->pi);
DPAA_ASSERT(dqrr->pmode == qm_dqrr_pvb);
if ((res->verb & QM_DQRR_VERB_VBIT) == dqrr->vbit) {
dqrr->pi = (dqrr->pi + 1) & (QM_DQRR_SIZE - 1);
if (!dqrr->pi)
dqrr->vbit ^= QM_DQRR_VERB_VBIT;
dqrr->fill++;
__maybe_unused struct qm_dqrr *dqrr = &portal->dqrr;
DPAA_ASSERT(dqrr->cmode == qm_dqrr_cdc);
DPAA_ASSERT((dqrr->ring + idx) == dq);
__maybe_unused struct qm_dqrr *dqrr = &portal->dqrr;
DPAA_ASSERT(dqrr->cmode == qm_dqrr_cdc);
.cb.dqrr = cb_dqrr,
const struct qm_dqrr_entry *dqrr,
if (process_frame_data(handler, &dqrr->fd)) {
if (qman_enqueue(&handler->tx, &dqrr->fd)) {
const struct qm_dqrr_entry *dqrr,
process_frame_data(handler, &dqrr->fd);
if (qman_enqueue(&handler->tx, &dqrr->fd)) {
handler->rx.cb.dqrr = special_dqrr;
handler->rx.cb.dqrr = normal_dqrr;