drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

149

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

158

struct dpu_hw_sspp *ctx, u32 op_mode_off)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

181

void dpu_hw_sspp_setup_opmode(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

201

void dpu_hw_sspp_setup_csc10_opmode(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

222

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

264

u32 flags, struct dpu_hw_sspp *ctx, u32 op_mode_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

372

static void dpu_hw_sspp_setup_pe_config(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

429

void dpu_hw_sspp_setup_scaler3(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

448

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

474

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

525

void dpu_hw_sspp_setup_csc(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

546

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

562

u32 color, struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

574

static void dpu_hw_sspp_setup_qos_lut(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

585

void dpu_hw_sspp_setup_qos_ctrl_impl(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

592

static void dpu_hw_sspp_setup_qos_ctrl(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

605

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

620

static bool dpu_hw_sspp_setup_clk_force_ctrl(struct dpu_hw_sspp *ctx, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

630

static void _setup_layer_ops(struct dpu_hw_sspp *c,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

663

int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

725

struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

731

struct dpu_hw_sspp *hw_pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

13

struct dpu_hw_sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

173

struct dpu_hw_sspp *sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

206

void (*setup_pe)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

222

void (*setup_csc)(struct dpu_hw_sspp *ctx, const struct dpu_csc_cfg *data);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

244

void (*setup_sharpening)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

252

void (*setup_qos_lut)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

260

void (*setup_qos_ctrl)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

268

bool (*setup_clk_force_ctrl)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

276

void (*setup_histogram)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

284

void (*setup_scaler)(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

326

struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

332

int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

335

void dpu_hw_sspp_setup_opmode(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

338

void dpu_hw_sspp_setup_csc10_opmode(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

341

void dpu_hw_sspp_setup_scaler3(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

345

void dpu_hw_sspp_setup_csc(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

349

struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

353

u32 flags, struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

358

struct dpu_hw_sspp *ctx, u32 src_size_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

382

u32 color, struct dpu_hw_sspp *ctx, u32 const_clr_off);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

384

void dpu_hw_sspp_setup_qos_ctrl_impl(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

387

void dpu_hw_sspp_init_v13(struct dpu_hw_sspp *c,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

113

struct dpu_hw_sspp *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

121

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

132

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

152

static void dpu_hw_sspp_setup_pe_config_v13(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

196

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

217

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

239

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

252

static void dpu_hw_sspp_setup_qos_lut_v13(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

261

static void dpu_hw_sspp_setup_qos_ctrl_v13(struct dpu_hw_sspp *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

274

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

284

static bool dpu_hw_sspp_setup_clk_force_ctrl_v13(struct dpu_hw_sspp *ctx, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

294

void dpu_hw_sspp_init_v13(struct dpu_hw_sspp *c,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

282

struct dpu_hw_sspp *hw = dpu_rm_get_sspp(&dpu_kms->rm, i);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1013

struct dpu_hw_sspp *sspp, const struct msm_format *fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1828

struct dpu_hw_sspp *pipe_hw;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

336

static bool _dpu_plane_sspp_clk_force_ctrl(struct dpu_hw_sspp *sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

426

static void _dpu_plane_setup_scaler3(struct dpu_hw_sspp *pipe_hw,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

535

struct dpu_hw_sspp *pipe_hw = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

918

static int dpu_plane_is_multirect_capable(struct dpu_hw_sspp *sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

953

static int dpu_plane_is_multirect_parallel_capable(struct dpu_hw_sspp *sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

185

struct dpu_hw_sspp *hw;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

788

static struct dpu_hw_sspp *dpu_rm_try_sspp(struct dpu_rm *rm,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

795

struct dpu_hw_sspp *hw_sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

838

struct dpu_hw_sspp *dpu_rm_reserve_sspp(struct dpu_rm *rm,

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

843

struct dpu_hw_sspp *hw_sspp = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

123

static inline struct dpu_hw_sspp *dpu_rm_get_sspp(struct dpu_rm *rm, enum dpu_sspp sspp_idx)

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

39

struct dpu_hw_sspp *hw_sspp[SSPP_MAX - SSPP_NONE];

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h

83

struct dpu_hw_sspp *dpu_rm_reserve_sspp(struct dpu_rm *rm,