drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

451

struct dpu_hw_ctl *ctl = mixer->lm_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

527

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

858

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

224

struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

97

struct dpu_hw_ctl *lm_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1635

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1715

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1754

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1788

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1844

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1991

static void dpu_encoder_dsc_pipe_cfg(struct dpu_hw_ctl *ctl,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2021

struct dpu_hw_ctl *ctl = enc_master->hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2185

struct dpu_hw_ctl *ctl = phys_enc->hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2219

static void dpu_encoder_dsc_pipe_clr(struct dpu_hw_ctl *ctl,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2240

struct dpu_hw_ctl *ctl = enc_master->hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2260

struct dpu_hw_ctl *ctl = phys_enc->hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2353

struct dpu_hw_ctl *hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

180

struct dpu_hw_ctl *hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

449

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

535

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

54

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

336

struct dpu_hw_ctl *hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

446

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

533

struct dpu_hw_ctl *hw_ctl = phys_enc->hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

553

struct dpu_hw_ctl *ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

276

struct dpu_hw_ctl *hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

101

static inline bool dpu_hw_ctl_is_started(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

106

static inline void dpu_hw_ctl_trigger_pending(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

113

static inline void dpu_hw_ctl_clear_pending_flush(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

129

static inline void dpu_hw_ctl_update_pending_flush(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

137

static u32 dpu_hw_ctl_get_pending_flush(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

142

static inline void dpu_hw_ctl_trigger_flush_v1(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

182

static inline void dpu_hw_ctl_trigger_flush(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

189

static void dpu_hw_ctl_update_pending_flush_sspp(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

246

static void dpu_hw_ctl_update_pending_flush_mixer(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

281

static void dpu_hw_ctl_update_pending_flush_intf(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

302

static void dpu_hw_ctl_update_pending_flush_wb(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

316

static void dpu_hw_ctl_update_pending_flush_cdm(struct dpu_hw_ctl *ctx, enum dpu_cdm cdm_num)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

323

static void dpu_hw_ctl_update_pending_flush_wb_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

330

static void dpu_hw_ctl_update_pending_flush_cwb_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

337

static void dpu_hw_ctl_update_pending_flush_intf_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

344

static void dpu_hw_ctl_update_pending_flush_periph_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

351

static void dpu_hw_ctl_update_pending_flush_merge_3d_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

358

static void dpu_hw_ctl_update_pending_flush_dsc_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

365

static void dpu_hw_ctl_update_pending_flush_cdm_v1(struct dpu_hw_ctl *ctx, enum dpu_cdm cdm_num)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

371

static void dpu_hw_ctl_update_pending_flush_dspp(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

393

struct dpu_hw_ctl *ctx, enum dpu_dspp dspp, u32 dspp_sub_blk)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

412

static u32 dpu_hw_ctl_poll_reset_status(struct dpu_hw_ctl *ctx, u32 timeout_us)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

434

static int dpu_hw_ctl_reset_control(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

446

static int dpu_hw_ctl_wait_reset_status(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

465

static void dpu_hw_ctl_clear_all_blendstages(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

507

static void dpu_hw_ctl_setup_blendstage(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

570

static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

626

static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

659

static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

737

static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

754

static void dpu_hw_ctl_set_active_pipes(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

771

static void dpu_hw_ctl_set_active_lms(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

798

struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

805

struct dpu_hw_ctl *c;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

87

static inline u32 dpu_hw_ctl_get_flush_register(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

94

static inline void dpu_hw_ctl_trigger_start(struct dpu_hw_ctl *ctx)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

102

u32 (*get_pending_flush)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

111

void (*update_pending_flush)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

121

void (*update_pending_flush_wb)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

131

void (*update_pending_flush_cwb)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

141

void (*update_pending_flush_intf)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

151

void (*update_pending_flush_periph)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

161

void (*update_pending_flush_merge_3d)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

171

void (*update_pending_flush_sspp)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

181

void (*update_pending_flush_mixer)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

192

void (*update_pending_flush_dspp)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

202

void (*update_pending_flush_dsc)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

212

void (*update_pending_flush_cdm)(struct dpu_hw_ctl *ctx, enum dpu_cdm cdm_num);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

218

void (*trigger_flush)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

225

u32 (*get_flush_register)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

232

void (*setup_intf_cfg)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

24

struct dpu_hw_ctl;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

240

void (*reset_intf_cfg)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

246

int (*reset)(struct dpu_hw_ctl *c);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

257

int (*wait_reset_status)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

263

void (*clear_all_blendstages)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

271

void (*setup_blendstage)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

279

void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

287

void (*set_active_pipes)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

295

void (*set_active_lms)(struct dpu_hw_ctl *ctx,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

349

static inline struct dpu_hw_ctl *to_dpu_hw_ctl(struct dpu_hw_blk *hw)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

351

return container_of(hw, struct dpu_hw_ctl, base);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

354

struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

72

void (*trigger_start)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

79

bool (*is_started)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

87

void (*trigger_pending)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

95

void (*clear_pending_flush)(struct dpu_hw_ctl *ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

142

struct dpu_hw_ctl *hw;

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

456

const struct dpu_hw_ctl *ctl;