drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1122

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1144

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1250

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1417

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1465

struct dpu_encoder_phys *phy_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1493

struct dpu_encoder_phys *phy_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1551

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1567

struct dpu_encoder_phys *ready_phys, u32 event)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1632

struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1681

static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1713

void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1751

static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1799

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

182

struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

183

struct dpu_encoder_phys *cur_master;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

184

struct dpu_encoder_phys *cur_slave;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1842

struct dpu_encoder_phys *phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2020

struct dpu_encoder_phys *enc_master = dpu_enc->cur_master;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2073

struct dpu_encoder_phys *phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2114

struct dpu_encoder_phys *phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2158

struct dpu_encoder_phys *phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2179

static void dpu_encoder_helper_reset_mixers(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2239

struct dpu_encoder_phys *enc_master = dpu_enc->cur_master;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2258

void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

230

u32 dpu_encoder_get_drm_fmt(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2348

void dpu_encoder_helper_phys_setup_cwb(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2416

void dpu_encoder_helper_phys_setup_cdm(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2503

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

253

bool dpu_encoder_needs_periph_flush(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2537

struct dpu_encoder_phys *enc = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2824

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2865

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2906

unsigned int dpu_encoder_helper_get_cwb_mask(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2920

unsigned int dpu_encoder_helper_get_dsc(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2928

void dpu_encoder_phys_init(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

320

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

343

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

373

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

435

void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

461

int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

539

struct dpu_encoder_phys *phys = dpu_enc ? dpu_enc->cur_master : NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

550

struct dpu_encoder_phys *phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

570

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

763

struct dpu_encoder_phys *phys_enc;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

823

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

843

struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

101

void (*enable)(struct dpu_encoder_phys *encoder);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

102

void (*disable)(struct dpu_encoder_phys *encoder);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

103

int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

104

int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

105

int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

106

void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

107

void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

108

void (*trigger_start)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

109

bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

110

void (*irq_enable)(struct dpu_encoder_phys *phys);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

111

void (*irq_disable)(struct dpu_encoder_phys *phys);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

112

void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

113

void (*restore)(struct dpu_encoder_phys *phys);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

114

int (*get_line_count)(struct dpu_encoder_phys *phys);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

115

int (*get_frame_count)(struct dpu_encoder_phys *phys);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

116

void (*prepare_wb_job)(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

118

void (*cleanup_wb_job)(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

120

bool (*is_valid_for_commit)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

203

static inline int dpu_encoder_phys_inc_pending(struct dpu_encoder_phys *phys)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

221

struct dpu_encoder_phys base;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

243

struct dpu_encoder_phys base;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

282

struct dpu_encoder_phys *dpu_encoder_phys_vid_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

285

struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

288

struct dpu_encoder_phys *dpu_encoder_phys_wb_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

291

void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

294

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

312

unsigned int dpu_encoder_helper_get_cwb_mask(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

314

unsigned int dpu_encoder_helper_get_dsc(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

318

u32 dpu_encoder_get_drm_fmt(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

320

bool dpu_encoder_needs_periph_flush(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

323

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

326

void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

329

int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

334

void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

336

void dpu_encoder_helper_phys_setup_cwb(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

339

void dpu_encoder_helper_phys_setup_cdm(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

344

struct dpu_encoder_phys *phy_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

347

struct dpu_encoder_phys *phy_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

351

struct dpu_encoder_phys *ready_phys, u32 event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

353

void dpu_encoder_phys_init(struct dpu_encoder_phys *phys,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

63

struct dpu_encoder_phys;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

96

void (*prepare_commit)(struct dpu_encoder_phys *encoder);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

97

bool (*is_master)(struct dpu_encoder_phys *encoder);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

98

void (*atomic_mode_set)(struct dpu_encoder_phys *encoder,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

116

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

131

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

144

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

150

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

167

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

218

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

242

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

298

static void dpu_encoder_phys_cmd_irq_enable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

321

static void dpu_encoder_phys_cmd_irq_disable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

337

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

418

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

42

static void dpu_encoder_phys_cmd_enable_te(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

437

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

44

static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

447

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

464

static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

486

struct dpu_encoder_phys *phys_enc, bool enable)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

50

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

504

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

510

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

531

static void dpu_encoder_phys_cmd_disable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

576

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

610

static void dpu_encoder_phys_cmd_enable_te(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

638

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

663

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

678

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

692

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

702

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

734

struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

737

struct dpu_encoder_phys *phys_enc = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

89

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

175

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

223

static void programmable_fetch_config(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

256

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

33

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

335

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

372

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

378

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

385

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

395

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

44

const struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

444

static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

504

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

531

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

551

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

577

static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

651

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

669

static void dpu_encoder_phys_vid_irq_enable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

687

static void dpu_encoder_phys_vid_irq_disable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

699

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

711

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

761

struct dpu_encoder_phys *dpu_encoder_phys_vid_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

764

struct dpu_encoder_phys *phys_enc = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

136

static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

171

static void dpu_encoder_phys_wb_setup_fb(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

218

static void dpu_encoder_phys_wb_setup_ctl(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

273

static void _dpu_encoder_phys_wb_update_flush(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

32

static bool dpu_encoder_phys_wb_is_master(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

322

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

356

struct dpu_encoder_phys *phys_enc = arg;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

384

static void dpu_encoder_phys_wb_irq_enable(struct dpu_encoder_phys *phys)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

400

static void dpu_encoder_phys_wb_irq_disable(struct dpu_encoder_phys *phys)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

410

struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

419

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

445

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

472

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

500

static bool dpu_encoder_phys_wb_needs_single_flush(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

511

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

521

static void dpu_encoder_phys_wb_enable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

530

static void dpu_encoder_phys_wb_disable(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

560

static void dpu_encoder_phys_wb_prepare_wb_job(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

60

struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

611

static void dpu_encoder_phys_wb_cleanup_wb_job(struct dpu_encoder_phys *phys_enc,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

624

static bool dpu_encoder_phys_wb_is_valid_for_commit(struct dpu_encoder_phys *phys_enc)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

662

struct dpu_encoder_phys *dpu_encoder_phys_wb_init(struct drm_device *dev,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

665

struct dpu_encoder_phys *phys_enc = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

92

struct dpu_encoder_phys *phys_enc)