dpu_crtc
struct dpu_crtc *dpu_crtc;
dpu_crtc = to_dpu_crtc(crtc);
dpu_crtc->cur_perf.bw_ctl = 0;
struct dpu_crtc *dpu_crtc;
dpu_crtc = to_dpu_crtc(crtc);
old = &dpu_crtc->cur_perf;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
if (!atomic_read(&dpu_crtc->frame_pending)) {
ret = wait_for_completion_timeout(&dpu_crtc->frame_done_comp,
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
if (atomic_inc_return(&dpu_crtc->frame_pending) == 1) {
dpu_crtc->play_count++;
reinit_completion(&dpu_crtc->frame_done_comp);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
atomic_read(&dpu_crtc->frame_pending));
trace_dpu_crtc_disable(DRMID(crtc), false, dpu_crtc);
dpu_crtc->enabled = false;
if (atomic_read(&dpu_crtc->frame_pending)) {
atomic_read(&dpu_crtc->frame_pending));
atomic_set(&dpu_crtc->frame_pending, 0);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc);
dpu_crtc->enabled = true;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
DRM_DEBUG_ATOMIC("%s: check\n", dpu_crtc->name);
dpu_crtc->name, plane->base.id, rc);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
trace_dpu_crtc_vblank(DRMID(&dpu_crtc->base), en, dpu_crtc);
dpu_crtc);
struct dpu_crtc *dpu_crtc;
dpu_crtc = s->private;
crtc = &dpu_crtc->base;
if (dpu_crtc->vblank_cb_count) {
ktime_t diff = ktime_sub(ktime_get(), dpu_crtc->vblank_cb_time);
dpu_crtc->vblank_cb_count * 1000, diff_ms) : 0;
fps, dpu_crtc->vblank_cb_count,
ktime_to_ms(diff), dpu_crtc->play_count);
dpu_crtc->vblank_cb_count = 0;
dpu_crtc->vblank_cb_time = ktime_set(0, 0);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
dpu_crtc->cur_perf.core_clk_rate);
(u32)DIV_ROUND_UP_ULL(dpu_crtc->cur_perf.bw_ctl, 1000));
dpu_crtc->cur_perf.max_per_pipe_ib);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
dpu_crtc, &_dpu_debugfs_status_fops);
&dpu_crtc->base,
struct dpu_crtc *dpu_crtc;
dpu_crtc = drmm_crtc_alloc_with_planes(dev, struct dpu_crtc, base,
if (IS_ERR(dpu_crtc))
return ERR_CAST(dpu_crtc);
crtc = &dpu_crtc->base;
spin_lock_init(&dpu_crtc->spin_lock);
atomic_set(&dpu_crtc->frame_pending, 0);
init_completion(&dpu_crtc->frame_done_comp);
INIT_LIST_HEAD(&dpu_crtc->frame_event_list);
for (i = 0; i < ARRAY_SIZE(dpu_crtc->frame_events); i++) {
INIT_LIST_HEAD(&dpu_crtc->frame_events[i].list);
list_add(&dpu_crtc->frame_events[i].list,
&dpu_crtc->frame_event_list);
kthread_init_work(&dpu_crtc->frame_events[i].work,
snprintf(dpu_crtc->name, DPU_CRTC_NAME_SIZE, "crtc%u", crtc->base.id);
spin_lock_init(&dpu_crtc->event_lock);
DRM_DEBUG_KMS("%s: successfully initialized crtc\n", dpu_crtc->name);
struct dpu_crtc *dpu_crtc, struct dpu_crtc_mixer *mixer,
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
DRM_DEBUG_ATOMIC("%s\n", dpu_crtc->name);
_dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer, stage_cfg);
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
if (dpu_crtc->event) {
DRM_DEBUG_VBL("%s: send event: %p\n", dpu_crtc->name,
dpu_crtc->event);
drm_crtc_send_vblank_event(crtc, dpu_crtc->event);
dpu_crtc->event = NULL;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
if (ktime_compare(dpu_crtc->vblank_cb_time, ktime_set(0, 0)) == 0)
dpu_crtc->vblank_cb_time = ktime_get();
dpu_crtc->vblank_cb_count++;
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
if (atomic_read(&dpu_crtc->frame_pending) < 1) {
} else if (atomic_dec_return(&dpu_crtc->frame_pending) == 0) {
complete_all(&dpu_crtc->frame_done_comp);
spin_lock_irqsave(&dpu_crtc->spin_lock, flags);
list_add_tail(&fevent->list, &dpu_crtc->frame_event_list);
spin_unlock_irqrestore(&dpu_crtc->spin_lock, flags);
struct dpu_crtc *dpu_crtc;
dpu_crtc = to_dpu_crtc(crtc);
spin_lock_irqsave(&dpu_crtc->spin_lock, flags);
fevent = list_first_entry_or_null(&dpu_crtc->frame_event_list,
spin_unlock_irqrestore(&dpu_crtc->spin_lock, flags);
struct dpu_crtc *dpu_crtc;
dpu_crtc = to_dpu_crtc(crtc);
WARN_ON(dpu_crtc->event);
dpu_crtc->event = crtc->state->event;
if (dpu_crtc->smmu_state.transition_error)
#define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base)
struct dpu_crtc *crtc),
TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),