drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

346

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

542

.dpp_read_state = dpp_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

1455

void dpp_read_state(struct dpp *dpp_base,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

375

.dpp_read_state = dpp20_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c

266

.dpp_read_state = dpp20_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1487

.dpp_read_state = dpp30_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c

109

.dpp_read_state = dpp30_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

97

.dpp_read_state = dpp30_read_state,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

224

.dpp_read_state = dpp401_read_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

467

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

93

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

94

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h

239

void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);