drivers/clk/microchip/clk-pic32.c

124

unsigned long div, div_up;

drivers/clk/microchip/clk-pic32.c

132

div_up = clamp_val(div + 1, divider_min, divider_max);

drivers/clk/microchip/clk-pic32.c

135

divided_rate_down = parent_rate / div_up;

drivers/clk/sophgo/clk-cv18xx-ip.c

890

cv1800_clk_setbit(&aclk->common, &aclk->div_up);

drivers/clk/sophgo/clk-cv18xx-ip.h

244

.div_up = CV1800_CLK_BIT(_div_up_reg, \

drivers/clk/sophgo/clk-cv18xx-ip.h

63

struct cv1800_clk_regbit div_up;

sound/core/pcm_lib.c

1020

t.max = div_up(best_num, best_den);

sound/core/pcm_lib.c

851

den = div_up(num, q);

sound/core/pcm_lib.c

917

t.max = div_up(best_num, best_den);