arch/mips/alchemy/common/clock.c

383

long div1, div2;

arch/mips/alchemy/common/clock.c

394

div2 = (div1 / scale) - 1; /* value to write to register */

arch/mips/alchemy/common/clock.c

396

if (div2 > maxdiv)

arch/mips/alchemy/common/clock.c

397

div2 = maxdiv;

arch/mips/alchemy/common/clock.c

399

*rv = div2;

arch/mips/alchemy/common/clock.c

401

div1 = ((div2 + 1) * scale);

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

63

static int div2[] = { 1, 2, 3, 4, 6, 8, 12 };

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

66

.divisors = div2,

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

67

.nr_divisors = ARRAY_SIZE(div2),

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

91

static int div2[] = { 1, 2, 0, 4 };

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

94

.divisors = div2,

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

95

.nr_divisors = ARRAY_SIZE(div2),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

48

static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6,

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

52

.divisors = div2,

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

53

.nr_divisors = ARRAY_SIZE(div2),

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

51

static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

55

.divisors = div2,

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

56

.nr_divisors = ARRAY_SIZE(div2),

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

53

static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

57

.divisors = div2,

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

58

.nr_divisors = ARRAY_SIZE(div2),

arch/sh/kernel/cpu/sh4a/clock-shx3.c

47

static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,

arch/sh/kernel/cpu/sh4a/clock-shx3.c

51

.divisors = div2,

arch/sh/kernel/cpu/sh4a/clock-shx3.c

52

.nr_divisors = ARRAY_SIZE(div2),

drivers/clk/at91/clk-sam9x60-pll.c

758

if (layout->div2)

drivers/clk/at91/clk-sam9x60-pll.c

81

if (core->layout->div2)

drivers/clk/at91/pmc.h

67

u8 div2;

drivers/clk/at91/sam9x7.c

152

.div2 = 1,

drivers/clk/at91/sam9x7.c

177

.div2 = 1,

drivers/clk/clk-rp1.c

550

unsigned int div1, div2;

drivers/clk/clk-rp1.c

557

for (div2 = 1; div2 <= div1; div2++) {

drivers/clk/clk-rp1.c

558

calc_rate = DIV_ROUND_CLOSEST(parent_rate, div1 * div2);

drivers/clk/clk-rp1.c

563

best_div2 = div2;

drivers/clk/clk-rp1.c

567

best_div2 = div2;

drivers/clk/clk-rp1.c

626

u32 div1, div2;

drivers/clk/clk-rp1.c

631

get_pll_prim_dividers(req->rate, req->best_parent_rate, &div1, &div2);

drivers/clk/clk-rp1.c

633

req->rate = DIV_ROUND_CLOSEST(req->best_parent_rate, div1 * div2);

drivers/clk/clk-vt8500.c

457

int div1, div2;

drivers/clk/clk-vt8500.c

464

for (div2 = 7; div2 >= 0; div2--)

drivers/clk/clk-vt8500.c

466

tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2));

drivers/clk/clk-vt8500.c

475

*divisor2 = div2;

drivers/clk/clk-vt8500.c

483

*divisor2 = div2;

drivers/clk/clk-vt8500.c

505

int div1, div2;

drivers/clk/clk-vt8500.c

512

for (div2 = 3; div2 >= 0; div2--)

drivers/clk/clk-vt8500.c

515

((div1 + 1) * (1 << div2));

drivers/clk/clk-vt8500.c

523

*divisor2 = div2;

drivers/clk/clk-vt8500.c

531

*divisor2 = div2;

drivers/clk/clk-vt8500.c

551

u32 filter, mul, div1, div2;

drivers/clk/clk-vt8500.c

565

ret = wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);

drivers/clk/clk-vt8500.c

567

pll_val = WM8650_BITS_TO_VAL(mul, div1, div2);

drivers/clk/clk-vt8500.c

570

ret = wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2);

drivers/clk/clk-vt8500.c

572

pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2);

drivers/clk/clk-vt8500.c

575

ret = wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);

drivers/clk/clk-vt8500.c

577

pll_val = WM8850_BITS_TO_VAL(mul, div1, div2);

drivers/clk/clk-vt8500.c

602

u32 filter, mul, div1, div2;

drivers/clk/clk-vt8500.c

616

&mul, &div1, &div2);

drivers/clk/clk-vt8500.c

619

mul, div1, div2);

drivers/clk/clk-vt8500.c

623

&filter, &mul, &div1, &div2);

drivers/clk/clk-vt8500.c

626

mul, div1, div2);

drivers/clk/clk-vt8500.c

630

&mul, &div1, &div2);

drivers/clk/clk-vt8500.c

633

mul, div1, div2);

drivers/clk/imx/clk-composite-8m.c

54

int div1, div2;

drivers/clk/imx/clk-composite-8m.c

62

for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) {

drivers/clk/imx/clk-composite-8m.c

63

int new_error = ((parent_rate / div1) / div2) - rate;

drivers/clk/imx/clk-composite-8m.c

67

*postdiv = div2;

drivers/clk/pxa/clk-pxa.c

186

if (freq->div2) {

drivers/clk/pxa/clk-pxa.h

140

unsigned int div2;

drivers/clk/sophgo/clk-sg2044-pll.c

173

unsigned int div1, div2;

drivers/clk/sophgo/clk-sg2044-pll.c

177

for_each_pll_limit_range(div2, &limits[PLL_LIMIT_POSTDIV2]) {

drivers/clk/sophgo/clk-sg2044-pll.c

181

div1, div2);

drivers/clk/sophgo/clk-sg2044-pll.c

188

best_div2 = div2;

drivers/clk/tegra/clk-tegra-super-cclk.c

54

unsigned int div2;

drivers/clk/tegra/clk-tegra-super-cclk.c

58

div2 = 1;

drivers/clk/tegra/clk-tegra-super-cclk.c

60

div2 = 0;

drivers/clk/tegra/clk-tegra-super-cclk.c

63

return parent_rate >> div2;

drivers/clk/tegra/clk-tegra-super-cclk.c

65

return tegra_clk_super_ops.recalc_rate(hw, parent_rate) >> div2;

drivers/clk/uniphier/clk-uniphier.h

114

#define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \

drivers/clk/uniphier/clk-uniphier.h

116

UNIPHIER_CLK_DIV(parent, div2)

drivers/clk/uniphier/clk-uniphier.h

118

#define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \

drivers/clk/uniphier/clk-uniphier.h

120

UNIPHIER_CLK_DIV2(parent, div2, div3)

drivers/clk/uniphier/clk-uniphier.h

122

#define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \

drivers/clk/uniphier/clk-uniphier.h

123

UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3), \

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

589

u32 edged, div2, p5en, edge, prediv2, all, regl, regh, mult;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

630

div2 = PREDIV2_MULT * all + p5en;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

632

div2 = all;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

646

div = div * div2;

drivers/comedi/drivers/adl_pci9118.c

532

unsigned int *div1, unsigned int *div2,

drivers/comedi/drivers/adl_pci9118.c

539

*div2 = *tim1 / pacer->osc_base; /* scan timer */

drivers/comedi/drivers/adl_pci9118.c

540

*div2 = *div2 / *div1; /* major timer is c1*c2 */

drivers/comedi/drivers/adl_pci9118.c

541

if (*div2 < chans)

drivers/comedi/drivers/adl_pci9118.c

542

*div2 = chans;

drivers/comedi/drivers/adl_pci9118.c

548

if (*div2 < (chans + 2))

drivers/comedi/drivers/adl_pci9118.c

549

*div2 = chans + 2;

drivers/comedi/drivers/adl_pci9118.c

552

*tim1 = *div1 * *div2 * pacer->osc_base;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2949

int div2;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2957

for (div2 = 10; div2 > 0; div2--) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2958

int dco = div1 * div2 * clock_khz * 5;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2965

if (div2 >= 2) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3008

MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO(div2);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3230

u32 m1, m2_int, m2_frac, div1, div2, ref_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3279

div2 = (hw_state->mg_clktop2_hsclkctl &

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3284

if (div2 == 0)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3285

div2 = 1;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3293

tmp = div_u64(tmp, 5 * div1 * div2);

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c

89

u32 div2 = 0;

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c

93

div2 = 1;

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c

97

nvkm_wr32(device, 0x00ec04 + (sor->id * 0x10), div2);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

291

u32 div2 = sor->asy.link == 3;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

297

div2 = 1;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

300

nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1);

drivers/iio/adc/at91-sama5d2_adc.c

1856

u64 div1, div2;

drivers/iio/adc/at91-sama5d2_adc.c

1894

div2 = DIV_ROUND_CLOSEST_ULL((u64)clb->p4, AT91_ADC_TS_VTEMP_DT);

drivers/iio/adc/at91-sama5d2_adc.c

1895

div2 *= 1000;

drivers/iio/adc/at91-sama5d2_adc.c

1896

*val = clb->p1 + (int)div1 - (int)div2;

drivers/media/dvb-frontends/stb0899_algo.c

1274

int div1, div2, rem1, rem2;

drivers/media/dvb-frontends/stb0899_algo.c

1277

div2 = config->btr_nco_bits - div1 - 1;

drivers/media/dvb-frontends/stb0899_algo.c

1286

intval2 = bTrNomFreq / (1 << div2);

drivers/media/dvb-frontends/stb0899_algo.c

1289

rem2 = bTrNomFreq % (1 << div2);

drivers/media/dvb-frontends/stb0899_algo.c

1291

srate = (intval1 * intval2) + ((intval1 * rem2) / (1 << div2)) + ((intval2 * rem1) / (1 << div1));

drivers/media/tuners/mt2060.c

196

u32 div1,num1,div2,num2;

drivers/media/tuners/mt2060.c

233

div2 = num2 / 8192;

drivers/media/tuners/mt2060.c

252

b[5] = ((num2 >>12) & 1) | (div2 << 1);

drivers/media/tuners/mt2060.c

256

dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);

drivers/media/tuners/mt2131.c

111

div2 = num2 / 8192;

drivers/media/tuners/mt2131.c

140

b[6] = div2;

drivers/media/tuners/mt2131.c

146

(int)div1, (int)num1, (int)div2, (int)num2);

drivers/media/tuners/mt2131.c

89

u32 div1, num1, div2, num2;

drivers/spi/spi-omap-uwire.c

315

int div2;

drivers/spi/spi-omap-uwire.c

372

div2 = (rate / div1 + hz - 1) / hz;

drivers/spi/spi-omap-uwire.c

373

if (div2 <= 8)

drivers/spi/spi-omap-uwire.c

391

switch (div2) {

drivers/video/fbdev/amifb.c

1028

#define vsstrt2hw(vsstrt) (div2(vsstrt))

drivers/video/fbdev/amifb.c

1029

#define vsstop2hw(vsstop) (div2(vsstop))

drivers/video/fbdev/amifb.c

1030

#define vtotal2hw(vtotal) (div2(vtotal) - 1)

drivers/video/fbdev/amifb.c

1037

#define vbstrt2hw(vbstrt) (div2(vbstrt))

drivers/video/fbdev/amifb.c

1038

#define vbstop2hw(vbstop) (div2(vbstop))

drivers/video/fbdev/cyber2000fb.c

658

u_int div2, t_div1, best_div1, best_mult;

drivers/video/fbdev/cyber2000fb.c

667

for (div2 = 0; div2 < 4; div2++) {

drivers/video/fbdev/cyber2000fb.c

670

new_pll = pll_ps / cfb->divisors[div2];

drivers/video/fbdev/cyber2000fb.c

677

if (div2 == 4)

drivers/video/fbdev/cyber2000fb.c

733

hw->clock_div = div2 << 6 | (best_div1 - 1);

sound/soc/codecs/da7210.c

1005

pll_div2 = da7210_pll_div[cnt].div2;

sound/soc/codecs/da7210.c

215

u8 div2;

sound/soc/codecs/sgtl5000.c

1012

if (div2)

sound/soc/codecs/sgtl5000.c

988

int div2;

sound/soc/codecs/sgtl5000.c

993

div2 = 1;

sound/soc/codecs/sgtl5000.c

996

div2 = 0;

sound/soc/codecs/wm8753.c

692

u32 div2:1;

sound/soc/codecs/wm8753.c

710

pll_div->div2 = 1;

sound/soc/codecs/wm8753.c

713

pll_div->div2 = 0;

sound/soc/codecs/wm8753.c

783

(pll_div.div2 << 3));

sound/soc/codecs/wm8978.c

403

u8 div2;

sound/soc/codecs/wm8978.c

417

pll_div->div2 = 1;

sound/soc/codecs/wm8978.c

420

pll_div->div2 = 0;

sound/soc/codecs/wm8978.c

539

__func__, pll_div.n, pll_div.k, pll_div.div2);

sound/soc/codecs/wm8978.c

544

snd_soc_component_write(component, WM8978_PLL_N, (pll_div.div2 << 4) | pll_div.n);

sound/soc/codecs/wm8983.c

744

u32 div2:1;

sound/soc/codecs/wm8983.c

756

pll_div->div2 = 0;

sound/soc/codecs/wm8983.c

760

pll_div->div2 = 1;

sound/soc/codecs/wm8983.c

809

(pll_div.div2 << WM8983_PLL_PRESCALE_SHIFT)

sound/soc/codecs/wm8985.c

841

u32 div2:1;

sound/soc/codecs/wm8985.c

853

pll_div->div2 = 0;

sound/soc/codecs/wm8985.c

857

pll_div->div2 = 1;

sound/soc/codecs/wm8985.c

902

(pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT)

sound/soc/codecs/wm8990.c

797

u32 div2;

sound/soc/codecs/wm8990.c

816

pll_div->div2 = 1;

sound/soc/codecs/wm8990.c

819

pll_div->div2 = 0;

sound/soc/codecs/wm8990.c

862

(pll_div.div2?WM8990_PRESCALE:0));

sound/soc/codecs/wm8991.c

868

u32 div2;

sound/soc/codecs/wm8991.c

887

pll_div->div2 = 1;

sound/soc/codecs/wm8991.c

890

pll_div->div2 = 0;

sound/soc/codecs/wm8991.c

935

(pll_div.div2 ? WM8991_PRESCALE : 0));

sound/soc/fsl/fsl_ssi.c

686

u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i;

sound/soc/fsl/fsl_ssi.c

727

div2 = 0;

sound/soc/fsl/fsl_ssi.c

729

factor = (div2 + 1) * (7 * psr + 1) * 2;