div_frac
*pmultiplier = div_frac(scaled64, tps32);
div_frac = div % (1 << 24);
core_rate = (xosc_rate * ((div_int << 24) + div_frac) + (1 << 23)) >> 24;
u32 *div_int, u32 *div_frac)
*div_frac = fbdiv_frac;
int div_int, div_frac;
u32 *div_int, u64 *div_frac)
*div_frac = div64_u64(rem << VC7_FOD_DENOMINATOR_BITS, rate);
u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div;
div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4;
while (div_frac >= fref3) {
div_frac -= fref3;
div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20);
(u8) (div_frac >> 16));
write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);
write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);
d = div_frac(d, jiffies_to_msecs(tz->passive_delay_jiffies));