drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1360

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, offset);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.h

45

bool dp_set_hw_training_pattern(

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c

86

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, DPRX);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c

98

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_eq, DPRX);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

207

dp_set_hw_training_pattern(link, link_res, DP_TRAINING_PATTERN_SEQUENCE_2, DPRX);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

243

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, offset);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

361

dp_set_hw_training_pattern(link, link_res, tr_pattern, offset);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_auxless.c

53

dp_set_hw_training_pattern(link, link_res, lt_settings.pattern_for_cr, DPRX);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_auxless.c

64

dp_set_hw_training_pattern(link, link_res, lt_settings.pattern_for_eq, DPRX);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

471

dp_set_hw_training_pattern(link, link_res, tr_pattern, 0);