drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

108

static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

140

static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

179

static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

230

static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

254

static void dmub_psr_set_sink_vtotal_in_psr_active(struct dmub_psr *dmub,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

273

static void dmub_psr_set_power_opt(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

292

static bool dmub_psr_copy_settings(struct dmub_psr *dmub,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

435

static void dmub_psr_force_static(struct dmub_psr *dmub, uint8_t panel_inst)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

454

static void dmub_psr_get_residency(struct dmub_psr *dmub, uint32_t *residency,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

480

static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

489

struct dmub_psr *dmub_psr_create(struct dc_context *ctx)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

491

struct dmub_psr *psr = kzalloc_obj(struct dmub_psr);

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

506

void dmub_psr_destroy(struct dmub_psr **dmub)

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

40

bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

42

void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

44

void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

46

void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

48

void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

49

void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

51

void (*psr_set_sink_vtotal_in_psr_active)(struct dmub_psr *dmub,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

53

void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

56

struct dmub_psr *dmub_psr_create(struct dc_context *ctx);

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

57

void dmub_psr_destroy(struct dmub_psr **dmub);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

322

struct dmub_psr *psr;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

589

struct dmub_psr *psr = dc->res_pool->psr;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

637

struct dmub_psr *psr = dc->res_pool->psr;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

694

struct dmub_psr *psr;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

911

struct dmub_psr *psr = dc->res_pool->psr;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

926

struct dmub_psr *psr = dc->res_pool->psr;