drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

770

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.dc = dc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

771

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.lock = true;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

772

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.is_required = is_dmub_lock_required;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

909

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.dc = dc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

910

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.lock = false;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

911

block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.is_required = is_dmub_lock_required;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1511

struct dc *dc = params->dmub_hw_control_lock_fast_params.dc;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1512

bool lock = params->dmub_hw_control_lock_fast_params.lock;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1514

if (params->dmub_hw_control_lock_fast_params.is_required) {

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

755

struct dmub_hw_control_lock_fast_params dmub_hw_control_lock_fast_params;