dmareg
dev->dmareg |= HIFN_DMAIER_R_DONE | HIFN_DMAIER_C_ABORT |
dev->dmareg &= ~HIFN_DMAIER_C_WAIT;
hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
dev->dmareg |= HIFN_DMAIER_C_WAIT;
hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
dmacsr, dev->dmareg, dmacsr & dev->dmareg, dma->cmdi,
if ((dmacsr & dev->dmareg) == 0)
hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg);
dev->dmareg &= ~(HIFN_DMAIER_C_WAIT);
hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
u32 dmareg;
dev->dmareg |= HIFN_DMAIER_PUBDONE;
hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
(wme ? dmareg(DMA_TX, 0) : 0),
dmareg(DMA_RX, 0),
dmareg(DMA_TX, 1), 0,
dmareg(DMA_TX, 2), 0,
dmareg(DMA_TX, 3),
unsigned char irqreg = 0, dmareg = 0, mpureg;
dmareg |= SB_DMASETUP_DMA0;
dmareg |= SB_DMASETUP_DMA1;
dmareg |= SB_DMASETUP_DMA3;
dmareg |= SB_DMASETUP_DMA5;
dmareg |= SB_DMASETUP_DMA6;
dmareg |= SB_DMASETUP_DMA7;
snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
if ((~realirq) & irqreg || (~realdma) & dmareg) {
chip->port, irqreg, dmareg, mpureg);