dma_type
val = SET_FIELD(VAS_LDMA_TYPE, val, winctx->dma_type);
winctx->dma_type = VAS_DMA_TYPE_INJECT;
winctx->dma_type = VAS_DMA_TYPE_INJECT;
enum vas_dma_type dma_type;
const struct mxs_dma_type *dma_type;
dma_type = (struct mxs_dma_type *)of_device_get_match_data(&pdev->dev);
mxs_dma->type = dma_type->type;
mxs_dma->dev_id = dma_type->id;
int dma_type;
dma_type = DMA_BIDIRECTIONAL;
dma_type = DMA_FROM_DEVICE;
common->rx_bufsize, dma_type);
common->rx_bufsize, dma_type);
enum mbox_type, enum dma_type, enum sta_type,
enum mbox_type mbox_tp, enum dma_type dma_tp,
switch( scb->dma_type ) {
scb->dma_type = MEGA_SGLIST;
scb->dma_type = MEGA_DMA_TYPE_NONE;
scb->dma_type = MEGA_DMA_TYPE_NONE;
u32 dma_type;
uint32_t dma_type;
scb->dma_type = MRAID_DMA_NONE;
scb->dma_type = MRAID_DMA_NONE;
scb->dma_type = MRAID_DMA_WSG;
scb->dma_type = MRAID_DMA_NONE;
scb->dma_type = MRAID_DMA_NONE;
int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC;
bus->dma_type = SNDRV_DMA_TYPE_DEV;
int dma_type = bus->dma_type ? bus->dma_type : SNDRV_DMA_TYPE_DEV;
err = snd_dma_alloc_pages(dma_type, bus->dev,
err = snd_dma_alloc_pages(dma_type, bus->dev,
return snd_dma_alloc_pages(dma_type, bus->dev, PAGE_SIZE, &bus->rb);
if (cfg->copier.dma_type == INVALID_OBJECT_ID)
u32 dma_type:5;
switch (module_template->cfg_ext->copier.dma_type) {
node_id->dma_type = te->copier.dma_type;
switch (node_id->dma_type) {
switch (te->copier.dma_type) {
u32 dma_type = t->cfg_ext->copier.dma_type;
switch (dma_type) {
node_id.dma_type = AVS_DMA_HDA_HOST_INPUT;
.offset = offsetof(struct avs_tplg_modcfg_ext, copier.dma_type),
.offset = offsetof(struct avs_tplg_modcfg_ext, whm.dma_type),
switch (cfg->copier.dma_type) {
u32 dma_type;
u32 dma_type;