dma_reg_write
dma_reg_write(ctlr, chan->int_clear, chan->mask);
dma_reg_write(ctlr, chan->td, chan_linear(chan));
dma_reg_write(chan->ctlr, enable ? chan->int_set : chan->int_clear,
dma_reg_write(ctlr, info->reg, val);
dma_reg_write(ctlr, rate_reg, chan->rate_factor);
dma_reg_write(ctlr, chan->int_set, chan->mask);
dma_reg_write(ctlr, rate_reg, ch->rate_factor);
dma_reg_write(ctlr, CPDMA_SOFTRESET, 1);
dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);
dma_reg_write(ctlr, CPDMA_TXCONTROL, 1);
dma_reg_write(ctlr, CPDMA_RXCONTROL, 1);
dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);
dma_reg_write(ctlr, CPDMA_TXCONTROL, 0);
dma_reg_write(ctlr, CPDMA_RXCONTROL, 0);
dma_reg_write(ctlr, CPDMA_MACEOIVECTOR, value);