dma64
const struct dynamic_dma_window_prop *dma64;
dma64 = window->prop;
*dma_addr = be64_to_cpu(dma64->dma_base);
*window_shift = be32_to_cpu(dma64->window_shift);
const struct dynamic_dma_window_prop *dma64)
window->prop = dma64;
const struct dynamic_dma_window_prop *dma64;
dma64 = of_get_property(pdn, name, &len);
if (!dma64 || len < sizeof(*dma64)) {
window = ddw_list_new_entry(pdn, dma64);
struct dma64 *dma_reg;
PDC_TXREGS_OFFSET + (sizeof(struct dma64) * ringset));
PDC_RXREGS_OFFSET + (sizeof(struct dma64) * ringset));
struct dma64 *dma_reg;
struct dma64 dmaregs[PDC_NUM_DMA_RINGS]; /* 0x0200 - 0x2fc */
struct dma64 *dma_reg;
bool dma64)
cq_host->dma64 = dma64;
if (cq_host->dma64) {
bool dma64)
if (dma64) {
bool dma64 = cq_host->dma64;
cq_host->ops->set_tran_desc(cq_host, &desc, addr, len, end, dma64);
cqhci_set_tran_desc(desc, addr, len, end, dma64);
if (cq_host->dma64) {
bool dma64;
dma_addr_t addr, int len, bool end, bool dma64);
int cqhci_init(struct cqhci_host *cq_host, struct mmc_host *mmc, bool dma64);
void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end, bool dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64) {
ret = cqhci_init(cq_host, host->mmc, dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
ret = cqhci_init(cq_host, host->mmc, dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64)
ret = cqhci_init(cq_host, host->mmc, dma64);
bool dma64 = false;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64) {
err = cqhci_init(cq_host, host->mmc, dma64);
dma_addr_t addr, int len, bool end, bool dma64)
cqhci_set_tran_desc(*desc, addr, len, end, dma64);
cqhci_set_tran_desc(*desc, addr, tmplen, false, dma64);
cqhci_set_tran_desc(*desc, addr, len, end, dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64)
ret = cqhci_init(cq_host, host->mmc, dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64)
ret = cqhci_init(cq_host, host->mmc, dma64);
bool dma64;
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
if (dma64)
ret = cqhci_init(cq_host, host->mmc, dma64);
slot = (int)(&(desc->dma64) - descbase);
desc->dma64.control0 = cpu_to_le32(ctl0);
desc->dma64.control1 = cpu_to_le32(ctl1);
desc->dma64.address_low = cpu_to_le32(addrlo);
desc->dma64.address_high = cpu_to_le32(addrhi);
struct b43_dmadesc64 dma64;
bool dma64; /* this dma engine is operating in 64-bit mode */
di->dma64 =
static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
if (dma64)
if (((struct rtl_hal_cfg *)id->driver_data)->mod_params->dma64 &&
if (!rtlpriv->cfg->mod_params->dma64)
.dma64 = false,
module_param_named(dma64, rtl92ee_mod_params.dma64, bool, 0444);
MODULE_PARM_DESC(dma64, "Set to 1 to use DMA 64 (default 0)\n");
bool dma64 = rtlpriv->cfg->mod_params->dma64;
set_txbuffer_desc_add_high_with_offset(tx_bd_desc, i, 0, dma64);
dma64);
((u64)addr >> 32), dma64);
bool dma64 = rtlpriv->cfg->mod_params->dma64;
dma64);
bool dma64 = rtlpriv->cfg->mod_params->dma64;
dma64) << 32;
u32 val, bool dma64)
if (dma64)
static inline u32 get_txbuffer_desc_addr_high(__le32 *pbd, u32 off, bool dma64)
if (dma64)
bool dma64)
if (dma64)
u32 __val, bool dma64)
if (dma64)
bool dma64;
bool dma64 = false;
dma64 = true;
if (!dma64 && dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(32))) {
"%s-bit PCI addressing enabled\n", dma64 ? "64" : "32");