drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1030

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1033

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1045

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1046

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1047

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1105

dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_CRC_CNTL,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

261

dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

424

dm_write_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

518

dm_write_reg_soc15(

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

528

dm_write_reg_soc15(

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

653

dm_write_reg_soc15(tg->ctx,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

675

dm_write_reg_soc15(

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

743

dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_BLANK_CONTROL,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

904

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

943

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

956

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);